Datasheet TPD4162F (Toshiba) - 5

TPD4162F 7.1.2. Truth Table Table 7.1.2 Truth Table Hall amp Input U Phase V Phase W Phase FGC FG HU HV HW High side Low side High side Low side High side Low side
H H L H OFF ON ON OFF OFF OFF H H H L L OFF ON OFF OFF ON OFF L H H H L OFF OFF OFF ON ON OFF H H L H L ON OFF OFF ON OFF OFF L H L H H ON OFF OFF OFF OFF ON H H L L H OFF OFF ON OFF OFF ON L H L L L OFF OFF OFF OFF OFF OFF L H H H H OFF OFF OFF OFF OFF OFF L L H L H OFF ON ON OFF OFF OFF H L H L L OFF ON OFF OFF ON OFF H L H H L OFF OFF OFF ON ON OFF H L L H L ON OFF OFF ON OFF OFF L L L H H ON OFF OFF OFF OFF ON L L L L H OFF OFF ON OFF OFF ON L L L L L OFF OFF OFF OFF OFF OFF L L H H H OFF OFF OFF OFF OFF OFF H Note: Hall amp input logic high (H) refers to H*+>H*-. (*: U/V/W)
7.2. Handling precautions
(1) When switching the power supply to the circuit on/off, ensure that VS < VVSOFF (all IGBT outputs off). At that time, either the VCC or the VBB can be turned on/off first. Note that if the power supply is switched off as described above, the IC may be destroyed if the current regeneration route to the VBB power supply is blocked when the VBB line is disconnected by a relay or similar while the motor is still running. (2) The triangular wave oscillator circuit, with externally connected C5 and R3, charges and discharges minute amounts of current. Therefore, subjecting the IC to noise when mounting it on the board may distort the triangular wave or cause malfunction. To avoid this, attach external parts to the base of the IC leads or isolate them from any tracks or wiring which carries large current. (3) The PWM of this IC is controlled by the on/off state of the high-side IGBT. (4) If a motor is locked where VBB voltage is low and duty is 100 %, it may not be possible to reboot after the load is released as a result of the high side being ON immediately prior to the motor being locked. This is because, over time, the bootstrap voltage falls, the high-side voltage decrease protection operates and the high-side output becomes OFF. In this case, since the level shift pulse necessary to turn the high side ON cannot be generated, reboot is not possible. A level shift pulse is generated by either the edge of a Hall sensor output or the edge of an internal PWM signal, but neither edge is available due to the motor lock and duty 100 % command. In order to reboot after a lock, the high-side power voltage must return to a level 0.5 V (typ.) higher than the voltage decrease protection level, and a high-side input signal must be introduced. As a high-side input signal is created by the aforementioned level shift pulse, it is possible to reboot by reducing PWM duty to less than 100 % or by forcing the motor to turn externally and creating an edge at a Hall sensor output. In order to ensure reboot after a system lock, the maximum duty of motor operation must be less than 100 %. © 2 020 5 2020-02-20 Toshiba Electronic Devices & Storage Corporation