Datasheet AD7293 (Analog Devices) - 8
| 制造商 | Analog Devices |
| 描述 | 12-Bit Power Amplifier Current Controller with ADC, DACs, Temperature and Current Sensors |
| 页数 / 页 | 79 / 8 — AD7293. Data Sheet. Parameter. Min. Typ. Max. Unit. Test … |
| 修订版 | D |
| 文件格式/大小 | PDF / 1.6 Mb |
| 文件语言 | 英语 |
AD7293. Data Sheet. Parameter. Min. Typ. Max. Unit. Test Conditions/Comments. TEMPERATURE SENSOR. Table 3. Parameter. Min Typ
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AD7293 Data Sheet Parameter Min Typ Max Unit Test Conditions/Comments
Unipolar DAC Short-Circuit Current 40 mA Shorted to AGND or DACVDD-UNI Bipolar DAC Short-Circuit Current 42 mA Shorted to AVSS or DACVDD-BI Load Current2 −10 +10 mA Source and/or sink within 300 mV of supply Capacitive Load Stability 10 nF RL = ∞ DC Output Impedance 1 Ω Midscale AC CHARACTERISTICS Output Voltage Settling Time2 1.2 1.3 µs ¼ to ¾ change within ±1 LSB, measured from the last SCLK rising edge, CL = 200 pF Slew Rate2 7.5 V/µs Digital Feedthrough2 0.1 nV-sec DAC to DAC Crosstalk2, 3 0.2 nV-sec Output Noise Spectral Density2, 3 55 nV/√Hz fIN = 10 kHz, bipolar 110 nV/√Hz fIN = 10 kHz, unipolar Output Noise2, 3 102 µV p-p Bipolar 135 µV p-p Unipolar CLAMP INPUTS Controlled by SLEEP0 and SLEEP1 digital pins Clamp Output Voltage2 −3 × V BI-VOUTx = −3 × VCLAMP0, VCLAMP1 VCLAMP0, VCLAMP1 Gain Error 0.2 % Within 200 mV of AVSS Input Referred Offset Error 5 mV VCLAMP0 and VCLAMP1 Input Current ±1 µA Clamp Voltage Range AVSS 0 V Output Current2 −10 +10 mA Source and/or sink within 300 mV of supply Clamp to Open-Loop Settling Time2 5 µs RL = ∞, CL = 200 pF, output voltage within 10%, 5 V transition 1 Specification tested with output unloaded. Linearity calculated using best fit line method and based on a reduced code range equivalent to 100 mV within either side of supply or ground ± 82 codes. 2 Guaranteed by design and characterization; not production tested. 3 All unipolar DACs must be enabled with an output code set to a minimum code of 41 LSBs.
TEMPERATURE SENSOR
AVDD, DVDD, DACVDD-BI = 4.5 V to 5.5 V (connect AVDD and DACVDD-BI to the same potential), DACVDD-UNI = 5 V, AVSS = −5 V, PAVDD = 5 V, AGND = DGND = 0 V, VREFIN = 2.5 V internal or external; VDRIVE = 1.7 V to 5.5 V; TA = −40°C to +125°C, unless otherwise noted.
Table 3. Parameter Min Typ Max Unit Test Conditions/Comments
INTERNAL TEMPERATURE SENSOR1 Operating Range2 −40 +125 °C See Figure 30 for −55°C to +125°C operation Accuracy ±1.25 ±3 °C Internal temperature sensor, TA = −40°C to +125°C ±1.25 °C TA = 25°C Resolution 0.125 °C EXTERNAL TEMPERATURE SENSOR1 External transistor = 2N3906; no capacitor between Dx−/Dx+ pins, and no series resistor between transistor and Dx−/Dx+ pins Operating Range −55 +150 °C Limited by external transistor Accuracy ±1.1 ±3 °C TA = −40°C to +105°C Resolution 0.125 °C LSB size 1 Guaranteed by design and characterization; not production tested. 2 Guaranteed functional to −55°C by design but accuracy is not guaranteed. Rev. D | Page 8 of 79 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAMS SPECIFICATIONS ADC DAC TEMPERATURE SENSOR CURRENT SENSOR CLOSED-LOOP SPECIFICATIONS GENERAL TIMING CHARACTERISTICS SPI Serial Interface Asynchronous Inputs Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG-TO-DIGITAL CONVERTER (ADC) OVERVIEW ADC TRANSFER FUNCTIONS ANALOG INPUTS Single-Ended Mode Differential Mode Pseudo Differential Mode CURRENT SENSOR Choosing the External Sense Resistor (RSENSE) TEMPERATURE SENSOR INTERNAL CHANNEL MONITORING DAC OPERATION Bipolar DACs Unipolar DACs DAC Enabling and Clamping Software Clamping: Internal ALERT0 Routing PMOS Drain Switch Control REFERENCE VDRIVE FEATURE OPEN-LOOP MODE CLOSED-LOOP MODE Adjustable Closed-Loop Setpoint Ramp Time Fast Ramp Feature Closed-Loop Sequencing Closed-Loop Integrator Programmable Voltage Limit Closed-Loop Range Upper Voltage Limit DIGITAL INPUT/OUTPUT REGISTERS LOAD DAC (LDAC PIN) Instantaneous DAC Updating (Asynchronous) Deferred DAC Updating (Synchronous) ALERTS AND LIMITS ALERTx Pins Software Alerts Page GPIO0 to GPIO3 Routing to ALERT1 AVDD AND AVSS ALARM MAXIMUM AND MINIMUM PAGES HYSTERESIS REGISTER SETTINGS REGISTERS COMMON TO ALL PAGES No Op Register (Register 0x00) Page Select Pointer Register (Register 0x01) Conversion Command (Register 0x02) Result Register (Register 0x03) DAC Enable Register (Register 0x04) GPIO Register (Register 0x05) Device ID Register (Register 0x0C) Software Reset Register (Register 0x0F) RESULT 0/DAC INPUT (PAGE 0x00) Voltage Input (VINx) Result Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEINT and TSENSEDx) Result Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) Result Registers (Register 0x28 to Register 0x2B) DAC Input (UNI-VOUTx and BI-VOUTx) Registers (Register 0x30 to Register 0x37) RESULT 1 (PAGE 0x01) Voltage Supply Monitor Result Registers (Register 0x10 to Register 0x13) Bipolar DAC Internal Monitor Result (BI-VOUT0MON to BI-VOUT3MON) Registers (Register 0x14 to Register 0x17) RSx+MON Result Registers (Register 0x28 to Register 0x2B) CONFIGURATION (PAGE 0x02) Digital Output Enable Register (Register 0x11) Digital Input/Output Function Register (Register 0x12) Digital Functional Polarity Register (Register 0x13) General Register (Register 0x14) VINx Range x Registers (Register 0x15 and Register 0x16) VINx Differential/Single-Ended Enable Register (Register 0x17) VINx Filter Register (Register 0x18) VINx Background Enable Register (Register 0x19) Conversion Delay Register (Register 0x1A) Temperature Sensor (TSENSEx) Background Enable Register (Register 0x1B) Current Sensor (ISENSEx) Background Enable Register (Register 0x1C) Current Sensor (ISENSEx) Gain Register (Register 0x1D) DAC Snooze/SLEEP0 Pin Register (Register 0x1F) DAC Snooze/SLEEP1 Pin Register (Register 0x20) RSx+MON, Supply Monitor, BI-VOUTx Background Enable Register (Register 0x23) Integrator Limit and Closed-Loop Control Register (Register 0x28) PA_ON Control Register (Register 0x29) Ramp Time 0 to Ramp Time 3 Registers (Register 0x2A to Register 0x2D) Closed-Loop Fast Ramp and Integrator Time Constant Register (Register 0x2E) Integrator Limit Active Status (INTLIMITx) and AVSS/AVDD Alarm Mask Register (Register 0x2F) SEQUENCE (PAGE 0x03) Voltage Input (VINx) Sequence Register (Register 0x10) Current Sensor (ISENSEx) and Temperature Sensor (TSENSEx) Sequence Register (Register 0x11) RSx+MON, Supply Monitor, and BI-VOUTx Monitor Sequence Register (Register 0x12) HIGH LIMIT 0 (PAGE 0x04) VINx High Limit Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEx) High Limit Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) High Limit Registers (Register 0x28 to Register 0x2B) HIGH LIMIT 1 (PAGE 0x05) AVDD, DAC Supply (DACVDD-UNI/DACVDD-BI) and AVSS High Limit Registers (Register 0x10 to Register 0x13) BI-VOUT0MON to BI-VOUT3MON High Limit Registers (Register 0x14 to Register 0x17) RSx+MON High Limit Registers (Register 0x28 to Register 0x2B) LOW LIMIT 0 (PAGE 0x06) VINx Low Limit Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEx) Low Limit Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) Low Limit Registers (Register 0x28 to Register 0x2B) LOW LIMIT 1 (PAGE 0x07) AVDD, DAC Supply (DACVDD-UNI/DACVDD-BI), and AVSS Low Limit Registers (Register 0x10 to Register 0x13) BI-VOUT0MON to BI-VOUT3 MON Low Limit Registers (Register 0x14 to Register 0x17) RSx+MON Low Limit Registers (Register 0x28 to Register 0x2B) HYSTERESIS 0 (PAGE 0x08) VINx Hysteresis Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEx) Hysteresis Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) Hysteresis Registers (Register 0x28 to Register 0x2B) HYSTERESIS 1 (PAGE 0x09) AVDD, DAC Supply (DACVDD-UNI/DACVDD-BI), and AVSS Hysteresis Registers (Register 0x10 to Register 0x13) BI-VOUT0MON to BI-VOUT3MON Hysteresis Registers (Register 0x14 to Register 0x17) RSx+MON Hysteresis Registers (Register 0x28 to Register 0x2B) MINIMUM 0 (PAGE 0x0A) VINx Minimum Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEx) Minimum Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) Minimum Registers (Register 0x28 to Register 0x2B) MINIMUM 1 (PAGE 0x0B) AVDD, DAC Supply (DACVDD-UNI/DACVDD-BI), and AVSS Minimum Registers (Register 0x10 to Register 0x13) BI-VOUT0MON to BI-VOUT3MON Minimum Registers (Register 0x14 to Register 0x17) RSx+MON Minimum Registers (Register 0x28 to Register 0x2B) MAXIMUM 0 (PAGE 0x0C) VINx Maximum Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEx) Maximum Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) Maximum Registers (Register 0x28 to Register 0x2B) MAXIMUM 1 (PAGE 0x0D) AVDD, DAC Supply (DACVDD-UNI/DACVDD-BI), and AVSS Maximum Registers (Register 0x10 to Register 0x13) BI-VOUT0MON to BI-VOUT3MON Maximum Registers (Register 0x14 to Register 0x17) RSx+MON Maximum Registers (Register 0x28 to Register 0x2B) OFFSET 0 (PAGE 0x0E) VINx Offset Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEx) Offset Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) Offset Registers (Register 0x28 to Register 0x2B) Unipolar DAC (UNI-VOUTx) Offset Registers (Register 0x30 to Register 0x33) Bipolar DAC (BI-VOUTx) Offset Registers (Register 0x34 to Register 0x37) OFFSET 1 (PAGE 0x0F) AVDD, DAC Supply (DACVDD-UNI/DACVDD-BI), and AVSS Offset Registers (Register 0x10 to Register 0x13) BI-VOUT0MON to BI-VOUT3 MON Offset Registers (Register 0x14 to Register 0x17) RSx+MON Offset Registers (Register 0x28 to Register 0x2B) ALERT (PAGE 0x10) Alert Summary (ALERTSUM) Register (Register 0x10) VINx Alert Register (Register 0x12) Temperature Sensor (TSENSEx) Alert Register (Register 0x14) Current Sensor (ISENSEx) Alert Register (Register 0x15) Supply and BI-VOUTxMON Alert Register (Register 0x18) RSx+MON Alert Register (Register 0x19) INTLIMITx and AVSS/AVDD Alert Register (Register 0x1A) ALERT0 PIN ROUTING (PAGE 0x11) VINx ALERT0 Register (Register 0x12) Temperature Sensor (TSENSEx) ALERT0 Register (Register 0x14) Current Sensor (ISENSEx) ALERT0 Register (Register 0x15) Supply and BI-VOUTxMON ALERT0 Register (Register 0x18) RSx+MON ALERT0 Register (Register 0x19) INTLIMITx and AVss/AVDD ALERT0 Register (Register 0x1A) ALERT1 PIN ROUTING (PAGE 0x12) VINx ALERT1 Register (Register 0x12) Temperature Sensor (TSENSEx) ALERT1 Register (Register 0x14) Current Sensor (ISENSEx) ALERT1 Register (Register 0x15) Supply and BI-VOUTxMON ALERT1 Register (Register 0x18) RSx+MON ALERT1 Register (Register 0x19) INTLIMITx and AVSS/AVDD ALERT1 Register (Register 0x1A) SERIAL PORT INTERFACE INTERFACE PROTOCOL MODES OF OPERTION Background Mode (BG) Command Mode Current Sensor and Temperature Sensor Conversions Conversion Timing Current Sense and Temperature Sense Channel Integration Time Conversion and Integration Timing Example 1 Conversion and Integration Timing Example 2 Digital Filtering APPLICATIONS INFORMATION BASE STATION POWER AMPLIFIER CONTROL DEPLETION MODE AMPLIFIER BIASING AND PROTECTION LOOP COMPONENT SELECTION OUTLINE DIMENSIONS ORDERING GUIDE
AD7293 Data Sheet Parameter Min Typ Max Unit Test Conditions/Comments
Unipolar DAC Short-Circuit Current 40 mA Shorted to AGND or DACVDD-UNI Bipolar DAC Short-Circuit Current 42 mA Shorted to AVSS or DACVDD-BI Load Current2 −10 +10 mA Source and/or sink within 300 mV of supply Capacitive Load Stability 10 nF RL = ∞ DC Output Impedance 1 Ω Midscale AC CHARACTERISTICS Output Voltage Settling Time2 1.2 1.3 µs ¼ to ¾ change within ±1 LSB, measured from the last SCLK rising edge, CL = 200 pF Slew Rate2 7.5 V/µs Digital Feedthrough2 0.1 nV-sec DAC to DAC Crosstalk2, 3 0.2 nV-sec Output Noise Spectral Density2, 3 55 nV/√Hz fIN = 10 kHz, bipolar 110 nV/√Hz fIN = 10 kHz, unipolar Output Noise2, 3 102 µV p-p Bipolar 135 µV p-p Unipolar CLAMP INPUTS Controlled by SLEEP0 and SLEEP1 digital pins Clamp Output Voltage2 −3 × V BI-VOUTx = −3 × VCLAMP0, VCLAMP1 VCLAMP0, VCLAMP1 Gain Error 0.2 % Within 200 mV of AVSS Input Referred Offset Error 5 mV VCLAMP0 and VCLAMP1 Input Current ±1 µA Clamp Voltage Range AVSS 0 V Output Current2 −10 +10 mA Source and/or sink within 300 mV of supply Clamp to Open-Loop Settling Time2 5 µs RL = ∞, CL = 200 pF, output voltage within 10%, 5 V transition 1 Specification tested with output unloaded. Linearity calculated using best fit line method and based on a reduced code range equivalent to 100 mV within either side of supply or ground ± 82 codes. 2 Guaranteed by design and characterization; not production tested. 3 All unipolar DACs must be enabled with an output code set to a minimum code of 41 LSBs.
TEMPERATURE SENSOR
AVDD, DVDD, DACVDD-BI = 4.5 V to 5.5 V (connect AVDD and DACVDD-BI to the same potential), DACVDD-UNI = 5 V, AVSS = −5 V, PAVDD = 5 V, AGND = DGND = 0 V, VREFIN = 2.5 V internal or external; VDRIVE = 1.7 V to 5.5 V; TA = −40°C to +125°C, unless otherwise noted.
Table 3. Parameter Min Typ Max Unit Test Conditions/Comments
INTERNAL TEMPERATURE SENSOR1 Operating Range2 −40 +125 °C See Figure 30 for −55°C to +125°C operation Accuracy ±1.25 ±3 °C Internal temperature sensor, TA = −40°C to +125°C ±1.25 °C TA = 25°C Resolution 0.125 °C EXTERNAL TEMPERATURE SENSOR1 External transistor = 2N3906; no capacitor between Dx−/Dx+ pins, and no series resistor between transistor and Dx−/Dx+ pins Operating Range −55 +150 °C Limited by external transistor Accuracy ±1.1 ±3 °C TA = −40°C to +105°C Resolution 0.125 °C LSB size 1 Guaranteed by design and characterization; not production tested. 2 Guaranteed functional to −55°C by design but accuracy is not guaranteed. Rev. D | Page 8 of 79 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAMS SPECIFICATIONS ADC DAC TEMPERATURE SENSOR CURRENT SENSOR CLOSED-LOOP SPECIFICATIONS GENERAL TIMING CHARACTERISTICS SPI Serial Interface Asynchronous Inputs Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG-TO-DIGITAL CONVERTER (ADC) OVERVIEW ADC TRANSFER FUNCTIONS ANALOG INPUTS Single-Ended Mode Differential Mode Pseudo Differential Mode CURRENT SENSOR Choosing the External Sense Resistor (RSENSE) TEMPERATURE SENSOR INTERNAL CHANNEL MONITORING DAC OPERATION Bipolar DACs Unipolar DACs DAC Enabling and Clamping Software Clamping: Internal ALERT0 Routing PMOS Drain Switch Control REFERENCE VDRIVE FEATURE OPEN-LOOP MODE CLOSED-LOOP MODE Adjustable Closed-Loop Setpoint Ramp Time Fast Ramp Feature Closed-Loop Sequencing Closed-Loop Integrator Programmable Voltage Limit Closed-Loop Range Upper Voltage Limit DIGITAL INPUT/OUTPUT REGISTERS LOAD DAC (LDAC PIN) Instantaneous DAC Updating (Asynchronous) Deferred DAC Updating (Synchronous) ALERTS AND LIMITS ALERTx Pins Software Alerts Page GPIO0 to GPIO3 Routing to ALERT1 AVDD AND AVSS ALARM MAXIMUM AND MINIMUM PAGES HYSTERESIS REGISTER SETTINGS REGISTERS COMMON TO ALL PAGES No Op Register (Register 0x00) Page Select Pointer Register (Register 0x01) Conversion Command (Register 0x02) Result Register (Register 0x03) DAC Enable Register (Register 0x04) GPIO Register (Register 0x05) Device ID Register (Register 0x0C) Software Reset Register (Register 0x0F) RESULT 0/DAC INPUT (PAGE 0x00) Voltage Input (VINx) Result Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEINT and TSENSEDx) Result Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) Result Registers (Register 0x28 to Register 0x2B) DAC Input (UNI-VOUTx and BI-VOUTx) Registers (Register 0x30 to Register 0x37) RESULT 1 (PAGE 0x01) Voltage Supply Monitor Result Registers (Register 0x10 to Register 0x13) Bipolar DAC Internal Monitor Result (BI-VOUT0MON to BI-VOUT3MON) Registers (Register 0x14 to Register 0x17) RSx+MON Result Registers (Register 0x28 to Register 0x2B) CONFIGURATION (PAGE 0x02) Digital Output Enable Register (Register 0x11) Digital Input/Output Function Register (Register 0x12) Digital Functional Polarity Register (Register 0x13) General Register (Register 0x14) VINx Range x Registers (Register 0x15 and Register 0x16) VINx Differential/Single-Ended Enable Register (Register 0x17) VINx Filter Register (Register 0x18) VINx Background Enable Register (Register 0x19) Conversion Delay Register (Register 0x1A) Temperature Sensor (TSENSEx) Background Enable Register (Register 0x1B) Current Sensor (ISENSEx) Background Enable Register (Register 0x1C) Current Sensor (ISENSEx) Gain Register (Register 0x1D) DAC Snooze/SLEEP0 Pin Register (Register 0x1F) DAC Snooze/SLEEP1 Pin Register (Register 0x20) RSx+MON, Supply Monitor, BI-VOUTx Background Enable Register (Register 0x23) Integrator Limit and Closed-Loop Control Register (Register 0x28) PA_ON Control Register (Register 0x29) Ramp Time 0 to Ramp Time 3 Registers (Register 0x2A to Register 0x2D) Closed-Loop Fast Ramp and Integrator Time Constant Register (Register 0x2E) Integrator Limit Active Status (INTLIMITx) and AVSS/AVDD Alarm Mask Register (Register 0x2F) SEQUENCE (PAGE 0x03) Voltage Input (VINx) Sequence Register (Register 0x10) Current Sensor (ISENSEx) and Temperature Sensor (TSENSEx) Sequence Register (Register 0x11) RSx+MON, Supply Monitor, and BI-VOUTx Monitor Sequence Register (Register 0x12) HIGH LIMIT 0 (PAGE 0x04) VINx High Limit Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEx) High Limit Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) High Limit Registers (Register 0x28 to Register 0x2B) HIGH LIMIT 1 (PAGE 0x05) AVDD, DAC Supply (DACVDD-UNI/DACVDD-BI) and AVSS High Limit Registers (Register 0x10 to Register 0x13) BI-VOUT0MON to BI-VOUT3MON High Limit Registers (Register 0x14 to Register 0x17) RSx+MON High Limit Registers (Register 0x28 to Register 0x2B) LOW LIMIT 0 (PAGE 0x06) VINx Low Limit Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEx) Low Limit Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) Low Limit Registers (Register 0x28 to Register 0x2B) LOW LIMIT 1 (PAGE 0x07) AVDD, DAC Supply (DACVDD-UNI/DACVDD-BI), and AVSS Low Limit Registers (Register 0x10 to Register 0x13) BI-VOUT0MON to BI-VOUT3 MON Low Limit Registers (Register 0x14 to Register 0x17) RSx+MON Low Limit Registers (Register 0x28 to Register 0x2B) HYSTERESIS 0 (PAGE 0x08) VINx Hysteresis Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEx) Hysteresis Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) Hysteresis Registers (Register 0x28 to Register 0x2B) HYSTERESIS 1 (PAGE 0x09) AVDD, DAC Supply (DACVDD-UNI/DACVDD-BI), and AVSS Hysteresis Registers (Register 0x10 to Register 0x13) BI-VOUT0MON to BI-VOUT3MON Hysteresis Registers (Register 0x14 to Register 0x17) RSx+MON Hysteresis Registers (Register 0x28 to Register 0x2B) MINIMUM 0 (PAGE 0x0A) VINx Minimum Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEx) Minimum Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) Minimum Registers (Register 0x28 to Register 0x2B) MINIMUM 1 (PAGE 0x0B) AVDD, DAC Supply (DACVDD-UNI/DACVDD-BI), and AVSS Minimum Registers (Register 0x10 to Register 0x13) BI-VOUT0MON to BI-VOUT3MON Minimum Registers (Register 0x14 to Register 0x17) RSx+MON Minimum Registers (Register 0x28 to Register 0x2B) MAXIMUM 0 (PAGE 0x0C) VINx Maximum Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEx) Maximum Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) Maximum Registers (Register 0x28 to Register 0x2B) MAXIMUM 1 (PAGE 0x0D) AVDD, DAC Supply (DACVDD-UNI/DACVDD-BI), and AVSS Maximum Registers (Register 0x10 to Register 0x13) BI-VOUT0MON to BI-VOUT3MON Maximum Registers (Register 0x14 to Register 0x17) RSx+MON Maximum Registers (Register 0x28 to Register 0x2B) OFFSET 0 (PAGE 0x0E) VINx Offset Registers (Register 0x10 to Register 0x13) Temperature Sensor (TSENSEx) Offset Registers (Register 0x20 to Register 0x22) Current Sensor (ISENSEx) Offset Registers (Register 0x28 to Register 0x2B) Unipolar DAC (UNI-VOUTx) Offset Registers (Register 0x30 to Register 0x33) Bipolar DAC (BI-VOUTx) Offset Registers (Register 0x34 to Register 0x37) OFFSET 1 (PAGE 0x0F) AVDD, DAC Supply (DACVDD-UNI/DACVDD-BI), and AVSS Offset Registers (Register 0x10 to Register 0x13) BI-VOUT0MON to BI-VOUT3 MON Offset Registers (Register 0x14 to Register 0x17) RSx+MON Offset Registers (Register 0x28 to Register 0x2B) ALERT (PAGE 0x10) Alert Summary (ALERTSUM) Register (Register 0x10) VINx Alert Register (Register 0x12) Temperature Sensor (TSENSEx) Alert Register (Register 0x14) Current Sensor (ISENSEx) Alert Register (Register 0x15) Supply and BI-VOUTxMON Alert Register (Register 0x18) RSx+MON Alert Register (Register 0x19) INTLIMITx and AVSS/AVDD Alert Register (Register 0x1A) ALERT0 PIN ROUTING (PAGE 0x11) VINx ALERT0 Register (Register 0x12) Temperature Sensor (TSENSEx) ALERT0 Register (Register 0x14) Current Sensor (ISENSEx) ALERT0 Register (Register 0x15) Supply and BI-VOUTxMON ALERT0 Register (Register 0x18) RSx+MON ALERT0 Register (Register 0x19) INTLIMITx and AVss/AVDD ALERT0 Register (Register 0x1A) ALERT1 PIN ROUTING (PAGE 0x12) VINx ALERT1 Register (Register 0x12) Temperature Sensor (TSENSEx) ALERT1 Register (Register 0x14) Current Sensor (ISENSEx) ALERT1 Register (Register 0x15) Supply and BI-VOUTxMON ALERT1 Register (Register 0x18) RSx+MON ALERT1 Register (Register 0x19) INTLIMITx and AVSS/AVDD ALERT1 Register (Register 0x1A) SERIAL PORT INTERFACE INTERFACE PROTOCOL MODES OF OPERTION Background Mode (BG) Command Mode Current Sensor and Temperature Sensor Conversions Conversion Timing Current Sense and Temperature Sense Channel Integration Time Conversion and Integration Timing Example 1 Conversion and Integration Timing Example 2 Digital Filtering APPLICATIONS INFORMATION BASE STATION POWER AMPLIFIER CONTROL DEPLETION MODE AMPLIFIER BIASING AND PROTECTION LOOP COMPONENT SELECTION OUTLINE DIMENSIONS ORDERING GUIDE