Datasheet ADAS1000, ADAS1000-1, ADAS1000-2 (Analog Devices) - 5

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Data Sheet ADAS1000/ ADAS1000-1 /ADAS1000-2 SPECIFICATIONS
AVDD = 3.3 V ± 5%, IOVDD = 1.65 V to 3.6 V, AGND = DGND = 0 V, REFIN tied to REFOUT, externally supplied crystal/clock = 8.192 MHz. Decoupling for reference and supplies as noted in the Power Supply, Grounding, and Decoupling Strategy section. TA = −40°C to +85°C, unless otherwise noted. Typical specifications are mean values at TA = 25°C. For specified performance, internal ADCVDD and DVDD linear regulators have been used. They may be supplied from external regulators. ADCVDD = 1.8 V ± 5%, DVDD = 1.8 V ± 5%. Front-end gain settings: GAIN 0 = ×1.4, GAIN 1 = ×2.1, GAIN 2 = ×2.8, GAIN 3 = ×4.2.
Table 2. Parameter Min Typ Max Unit Test Conditions/Comments
ECG CHANNEL These specifications apply to the following pins: ECG1_LA, ECG2_LL, ECG3_RA, ECG4_V1, ECG5_V2, CM_IN (CE mode), EXT_RESP_xx pins when used in extend switch mode Electrode Input Range Independent of supply 0.3 1.3 2.3 V GAIN 0 (gain setting ×1.4) 0.63 1.3 1.97 V GAIN 1 (gain setting ×2.1) 0.8 1.3 1.8 V GAIN 2 (gain setting ×2.8) 0.97 1.3 1.63 V GAIN 3 (gain setting ×4.2) Input Bias Current −10 ±1 +10 nA Relates to each electrode input; over specified electrode input range; dc and ac lead-off are disabled, applies at ambient temperature, TA = 25°C −20 ±1 +20 nA Relates to each electrode input; over specified electrode input range; dc and ac lead-off are disabled, applies across full temperature range, TA = −40°C to +85°C −200 +200 nA Over full AGND to AVDD input range Input Offset −7 mV Electrode/vector mode with VCM = VCM_REF GAIN 3 −7 mV GAIN 2 −15 mV GAIN 1 −22 mV GAIN 0 Input Offset Tempco1 ±2 μV/°C Input Amplifier Input 1||10 GΩ||pF At 10 Hz Impedance2 CMRR2 105 110 dB 51 kΩ imbalance, 60 Hz with ±300 mV differential dc offset; per AAMI/IEC standards; with driven leg loop closed Crosstalk1 80 dB Between channels Resolution2 19 Bits Electrode/vector mode, 2 kHz data rate, 24-bit data-word 18 Bits Electrode/vector mode, 16 kHz data rate, 24-bit data-word 16 Bits Electrode/analog lead mode, 128 kHz data rate, 16-bit data-word Integral Nonlinearity Error 30 ppm GAIN 0; all data rates Differential Nonlinearity Error 5 ppm GAIN 0 Gain2 Referred to input. (2 × VREF)/Gain/(2N − 1); applies after factory calibration; user calibration adjusts this number GAIN 0 (×1.4) 4.9 µV/LSB At 19-bit level in 2 kHz data rate 9.81 μV/LSB At 18-bit level in 16 kHz data rate 39.24 μV/LSB At 16-bit level in 128 kHz data rate GAIN 1 (×2.1) 3.27 μV/LSB At 19-bit level in 2 kHz data rate 6.54 μV/LSB At 18-bit level in 16 kHz data rate 26.15 μV/LSB At 16-bit level in 128 kHz data rate GAIN 2 (×2.8) 2.45 μV/LSB At 19-bit level in 2 kHz data rate 4.9 μV/LSB At 18-bit level in 16 kHz data rate 19.62 μV/LSB At 16-bit level in 128 kHz data rate GAIN 3 (×4.2) 1.63 μV/LSB No factory calibration for this gain setting At 19-bit level in 2 kHz data rate 3.27 μV/LSB At 18-bit level in 16 kHz data rate 13.08 μV/LSB At 16-bit level in 128 kHz data rate Rev. C | Page 5 of 85 Document Outline Features Applications General Description Revision History Functional Block Diagram Specifications Noise Performance Timing Characteristics Standard Serial Interface Secondary Serial Interface (Master Interface for Customer-Based Digital Pace Algorithm) ADAS1000/ADAS1000-1 Only Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Applications Information Overview ECG Inputs—Electrodes/Leads ECG Channel Electrode/Lead Formation and Input Stage Configuration Analog Lead Mode and Calculation Digital Lead Mode and Calculation Electrode Mode: Single-Ended Input Electrode Configuration Electrode Mode: Common Electrode A and Electrode B Configurations Defibrillator Protection ESIS Filtering ECG Path Input Multiplexing Common-Mode Selection and Averaging Wilson Central Terminal (WCT) Right Leg Drive/Reference Drive Calibration DAC Gain Calibration Lead-Off Detection DC Lead-Off Detection DC Lead-Off and High Gains DC Lead-Off Debounce Timer AC Lead-Off Detection ACLO and Common-Mode Configuration ADC Out of Range Shield Driver Respiration (ADAS1000 Model Only) Internal Respiration Capacitors External Respiration Path External Respiration Capacitors Respiration Carrier Frequency Evaluating Respiration Performance Extend Switch On Respiration Paths Pacing Artifact Detection Function (ADAS1000 Only) Choice of Leads Detection Algorithm Overview Pace Edge Threshold Pace Level Threshold Pace Amplitude Threshold Pace Validation Filters Pace Width Filter Biventricular Pacers Pace Detection Measurements Evaluating Pace Detection Performance Pace Width Pace Latency Pace Detection via Secondary Serial Interface (ADAS1000 and ADAS1000-1 Only) Filtering Voltage Reference Gang Mode Operation Master/Slave Synchronizing Devices Calibration Common Mode Right Leg Drive Sequencing Devices into Gang Mode Number of Devices in Gang Mode Interfacing in Gang Mode Serial Interfaces Standard Serial Interface Write Mode Write/Read Data Format Data Frames/Packets Read Mode Serial Clock Rate Data Rate and Skip Mode Data Ready (DRDYB) Detecting Missed Conversion Data SPI Interface Resync CRC Word Clocks Secondary Serial Interface RESETB PDB Function SPI Output Frame Structure (ECG and Status Data) SPI Register Definitions and Memory Map Control Registers Details Examples of Interfacing to the ADAS1000 Example 1: Initialize the ADAS1000 for ECG Capture and Start Streaming Data Example 2: Enable Respiration and Stream Conversion Data Example 3: DC Lead-Off and Stream Conversion Data Example 4: Configure 150 Hz Test Tone Sine Wave on Each ECG Channel and Stream Conversion Data Example 5: Enable Pace Detection and Stream Conversion Data Example 6: Writing to Master and Slave Devices and Streaming Conversion Data Slave Configuration Master Configuration Software Flowchart Power Supply, Grounding, and Decoupling Strategy AVDD ADCVDD and DVDD Supplies Unused Pins/Paths Layout Recommendations Outline Dimensions Ordering Guide