Datasheet AD7294 (Analog Devices) - 5

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Data Sheet AD7294 SPECIFICATIONS DAC SPECIFICATIONS
AVDD = DVDD = 4.5 V to 5.5 V, AGND = DGND = 0 V, internal 2.5 V reference; VDRIVE = 2.7 V to 5.5 V; TA =−40°C to +105°C, unless otherwise noted. DAC OUTV+ AB and DAC OUTV+ CD = 4.5 V to 16.5 V, OFFSET IN x is floating, therefore, the DAC output span = 0 V to 5 V.
Table 1. Parameter Min Typ Max Unit Test Conditions/Comments
ACCURACY Resolution 12 Bits Relative Accuracy (INL) ±1 ±3 LSB Differential Nonlinearity (DNL) ±0.3 ±1 LSB Guaranteed monotonic Zero-Scale Error 2.5 8 mV Full-Scale Error of DAC and 15.51 mV DAC OUTV+ = 5.0 V Output Amplifier Full-Scale Error of DAC 2 mV DAC OUTV+ = 15.0 V Offset Error ±8.575 mV Measured in the linear region, TA = −40°C to +105°C ±2 mV Measured in the linear region, TA = 25°C Offset Error Temperature ±5 ppm/°C Coefficient Gain Error ±0.025 ±0.155 % FSR Gain Temperature Coefficient ±5 ppm/°C DAC OUTPUT CHARACTERISTICS Output Voltage Span 0 2 × VREF V 0 V to 5 V for a 2.5 V reference Output Voltage Offset 0 10 V The output voltage span can be positioned in the 0 V to 15 V range; if the OFFSET IN x is left floating, the offset pin = 2/3 × VREF , giving an output of 0 V to 2 × VREF Offset Input Pin Range 0 5 VOUT = 3 VOFFSET − 2 × VREF + VDAC DC Input Impedance2 75 kΩ 100 kΩ to VREF, and 200 kΩ to AGND, see Figure 48 Output Voltage Settling Time2 8 µs 1/4 to 3/4 change within 1/2 LSB, measured from last SCL edge Slew Rate2 1.1 V/µs Short-Circuit Current2 40 mA Full-scale current shorted to ground Load Current2 ±10 mA Source and/or sink within 200 mV of supply Capacitive Load Stability2 10 nF RL = ∞ DC Output Impedance2 1 Ω REFERENCE Reference Output Voltage 2.49 2.5 2.51 V ±0.4% maximum at 25°C, AVDD = DVDD = 4.5 V to 5.5 V Reference Input Voltage Range 0 AVDD − 2 V Input Current 100 125 µA VREF = 2.5 V Input Capacitance2 20 pF VREF Output Impedance2 25 Ω Reference Temperature 10 25 ppm/°C Coefficient 1 This value indicates that the DAC output amplifiers can output voltages 15.5 mV below the DAC OUTV+ supply. If higher DAC OUTV+ supply voltages are used, the full-scale error of the DAC is typically 2 mV with no load. 2 Samples are tested during initial release to ensure compliance; they are not subject to production testing. Rev. I | Page 5 of 47 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS DAC SPECIFICATIONS ADC SPECIFICATIONS GENERAL SPECIFICATIONS TIMING CHARACTERISTICS I2C Serial Interface Timing and Circuit Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY DAC TERMINOLOGY ADC TERMINOLOGY THEORY OF OPERATION ADC OVERVIEW ADC TRANSFER FUNCTIONS ANALOG INPUTS Single-Ended Mode Differential Mode Driving Differential Inputs Using an Op Amp Pair Pseudo Differential Mode CURRENT SENSOR Choosing RSENSE Current Sense Filtering Kelvin Sense Resistor Connection ANALOG COMPARATOR LOOP TEMPERATURE SENSOR Remote Sensing Diode Ideality Factor Base Emitter Voltage Base Resistance hFE Variation Series Resistance Cancellation DAC OPERATION Resistor String Output Amplifier ADC AND DAC REFERENCE VDRIVE FEATURE REGISTER SETTING ADDRESS POINTER REGISTER COMMAND REGISTER (0x00) RESULT REGISTER (0x01) ADC Channel Allocation TSENSE1, TSENSE2 RESULT REGISTERS (0X02 AND 0X03) TSENSEINT RESULT REGISTER (0X04) Temperature Value Format DACA, DACB, DACC, DACD, REGISTERS (0x01 TO 0x04) ALERT STATUS REGISTER A (0x05), REGISTER B (0x06), AND REGISTER C (0x07) CHANNEL SEQUENCE REGISTER (0x08) CONFIGURATION REGISTER (0x09) Sample Delay and Bit Trial Delay POWER-DOWN REGISTER (0x0A) DATAHIGH/DATALOW REGISTERS: 0x0B, 0x0C (VIN0); 0x0E, 0x0F (VIN1); 0x11, 0x12 (VIN2); 0x14, 0x15 (VIN3) HYSTERESIS REGISTERS: 0X0D (VIN0), 0X10 (VIN1), 0X13 (VIN2), 0X16 (VIN3) TSENSE OFFSET REGISTERS (0x26 AND 0x27) I2C INTERFACE GENERAL I2C TIMING SERIAL BUS ADDRESS BYTE INTERFACE PROTOCOL Writing a Single Byte of Data to an 8-Bit Register Writing Two Bytes of Data to a 16-Bit Register Writing to Multiple Registers Reading Data from an 8-Bit Register Reading Two Bytes of Data from a 16-Bit Register MODES OF OPERATION COMMAND MODE AUTOCYCLE MODE ALERTS AND LIMITS THEORY ALERT_FLAG BIT ALERT STATUS REGISTERS DATAHIGH AND DATALOW MONITORING FEATURES HYSTERESIS Using the Limit Registers to Store Minimum/Maximum Conversion Results APPLICATIONS INFORMATION BASE STATION POWER AMPLIFIER MONITOR AND CONTROL GAIN CONTROL OF POWER AMPLIFIER LAYOUT AND CONFIGURATION POWER SUPPLY BYPASSING AND GROUNDING Layout Considerations for External Temperature Sensors OUTLINE DIMENSIONS ORDERING GUIDE