AD7294Data SheetABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted.1 Stresses at or above those listed under Absolute Maximum Table 5. Ratings may cause permanent damage to the product. This is a ParameterRating stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational VPPx to AGND −0.3 V to +70 V section of this specification is not implied. Operation beyond AVDDx to AGND −0.3 V to +7 V the maximum operating conditions for extended periods may DAC OUTV+ AB to AGND −0.3 V to +17 V affect product reliability. DAC OUTV+ CD to AGND −0.3 V to +17 V DVDD to DGND −0.3 V to +7 V To conform with IPC 2221 industrial standards, it is advisable VDRIVE to OPGND −0.3 V to +7 V to use conformal coating on the high voltage pins. Digital Inputs to OPGND −0.3 V to VDRIVE + 0.3 V THERMAL RESISTANCE SDA/SCL to OPGND −0.3 V to +7 V Digital Outputs to OPGND −0.3 V to VDRIVE + 0.3 V Table 6. Thermal Resistance RS(+)/RS(−) to VPPx VPP − 0.3 V to VPP + 0.3 V Package TypeθJAθJCUnit REFOUT/REFIN ADC to AGND −0.3 V to AVDD + 0.3 V 64-Lead TQFP 54 16 °C/W REFOUT/REFIN DAC to AGND −0.3 V to AVDD + 0.3 V 56-Lead LFCSP 21 2 °C/W OPGND to AGND −0.3 V to +0.3 V ESD CAUTION OPGND to DGND −0.3 V to +0.3 V AGND to DGND −0.3 V to +0.3 V VOUTx to AGND −0.3 V to DAC OUTV(+) + 0.3 V Analog Inputs to AGND −0.3 V to AVDD + 0.3 V Operating Temperature Range B Version −40°C to +105°C Storage Temperature Range −65°C to +150°C Junction Temperature (T J Max) 150°C ESD Human Body Model 1 kV Reflow Soldering Peak 260°C Temperature 1 Transient currents of up to 100 mA do not cause SCR latch-up. Rev. I | Page 10 of 47 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS DAC SPECIFICATIONS ADC SPECIFICATIONS GENERAL SPECIFICATIONS TIMING CHARACTERISTICS I2C Serial Interface Timing and Circuit Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY DAC TERMINOLOGY ADC TERMINOLOGY THEORY OF OPERATION ADC OVERVIEW ADC TRANSFER FUNCTIONS ANALOG INPUTS Single-Ended Mode Differential Mode Driving Differential Inputs Using an Op Amp Pair Pseudo Differential Mode CURRENT SENSOR Choosing RSENSE Current Sense Filtering Kelvin Sense Resistor Connection ANALOG COMPARATOR LOOP TEMPERATURE SENSOR Remote Sensing Diode Ideality Factor Base Emitter Voltage Base Resistance hFE Variation Series Resistance Cancellation DAC OPERATION Resistor String Output Amplifier ADC AND DAC REFERENCE VDRIVE FEATURE REGISTER SETTING ADDRESS POINTER REGISTER COMMAND REGISTER (0x00) RESULT REGISTER (0x01) ADC Channel Allocation TSENSE1, TSENSE2 RESULT REGISTERS (0X02 AND 0X03) TSENSEINT RESULT REGISTER (0X04) Temperature Value Format DACA, DACB, DACC, DACD, REGISTERS (0x01 TO 0x04) ALERT STATUS REGISTER A (0x05), REGISTER B (0x06), AND REGISTER C (0x07) CHANNEL SEQUENCE REGISTER (0x08) CONFIGURATION REGISTER (0x09) Sample Delay and Bit Trial Delay POWER-DOWN REGISTER (0x0A) DATAHIGH/DATALOW REGISTERS: 0x0B, 0x0C (VIN0); 0x0E, 0x0F (VIN1); 0x11, 0x12 (VIN2); 0x14, 0x15 (VIN3) HYSTERESIS REGISTERS: 0X0D (VIN0), 0X10 (VIN1), 0X13 (VIN2), 0X16 (VIN3) TSENSE OFFSET REGISTERS (0x26 AND 0x27) I2C INTERFACE GENERAL I2C TIMING SERIAL BUS ADDRESS BYTE INTERFACE PROTOCOL Writing a Single Byte of Data to an 8-Bit Register Writing Two Bytes of Data to a 16-Bit Register Writing to Multiple Registers Reading Data from an 8-Bit Register Reading Two Bytes of Data from a 16-Bit Register MODES OF OPERATION COMMAND MODE AUTOCYCLE MODE ALERTS AND LIMITS THEORY ALERT_FLAG BIT ALERT STATUS REGISTERS DATAHIGH AND DATALOW MONITORING FEATURES HYSTERESIS Using the Limit Registers to Store Minimum/Maximum Conversion Results APPLICATIONS INFORMATION BASE STATION POWER AMPLIFIER MONITOR AND CONTROL GAIN CONTROL OF POWER AMPLIFIER LAYOUT AND CONFIGURATION POWER SUPPLY BYPASSING AND GROUNDING Layout Considerations for External Temperature Sensors OUTLINE DIMENSIONS ORDERING GUIDE