Datasheet ADUCM355 (Analog Devices) - 7

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Data Sheet ADuCM355 Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DISCRETE FOURIER TRANSFORM (DFT)- For impedance (Z) of 1 kΩ (0.02% tolerant BASED IMPEDANCE MEASUREMENTS resistor), excitation frequency = 0.1 Hz to 200 kHz, sine amplitude = 10 mV rms, RTIA = 5 kΩ, RCALx = 200 Ω, 1% accurate temperature coefficient 5 ppm/°C, single DFT measurement, DFT using 8192 ADC samples, Hanning on, HSDACCON, Bits[8:1] = 0x1B for low power mode and impedance measurements ≤80 kHz, HSDACCON, Bits[8:1] = 0x7 for high power mode and impedance measurements > 80 Hz Accuracy Magnitude −1.25 ±0.2 +1.25 % 20 kHz to 200 kHz ±0.2 % 10 Hz to 20 kHz ±1 % 1 Hz to <10 Hz Phase −0.3 ±0.1 +0.3 Degrees Three Resistor Star Cell Z = 2.2 Ω connected, see Figure 18 Accuracy 0.1 Hz to 200 kHz Magnitude ±0.5 % Phase ±0.5 Degrees Accuracy Z = 100 Ω connected, 0.1 Hz to 200 kHz, see Figure 18 Magnitude ±0.2 % Phase ±0.2 Degrees High Speed Loop See Figure 18 Allowed External Load 100 pF R2 + R3 ≤ 200 Ω, R1 ≤ 100 Ω, for excitation Capacitance1 frequencies ≥ 1 kHz 50 pF R2 + R3 ≤ 1 kΩ, R1 ≤ 500 Ω, for excitation frequencies ≥ 1 kHz 40 pF R2 + R3 ≤ 1.6 kΩ, R1 ≤ 800 Ω, for excitation frequencies ≥ 1 kHz Excitation Amplifier Bandwidth 3 MHz Impedance Frequency Range1 0.016 200,000 Hz Impedance Measurement Range1 0.4 10,000 Ω LOW POWER TIA AND POTENTIOSTAT AMPLIFIERS Input Bias Current 80 300 pA TIA, SEx pin 20 150 pA Potentiostat amplifiers, REx pin Offset Voltage 50 150 μV Offset Voltage Drift vs. Temperature 1 μV/°C Noise Unity-gain mode, rms voltage in 0.1 Hz to 10 Hz range 1.6 μV rms Normal mode (LPTIACONx Bit 2 = 0) 2 μV rms Half power mode (LPTIACONx Bit 2 = 1) Potentiostat Source and Sink −750 +750 μA Normal mode (LPTIACONx, Bits[4:3] = 00), Current1 from CEx pins −3 +3 mA High current mode (LPTIACONx, Bits[4:3] = 01 or 11), from CEx pins DC Power Supply Rejection Ratio DC 70 dB At REx pin, RTIA = 256 kΩ, RLOAD = 10 Ω PSRR Input Common-Mode Voltage Range1 300 AVDD − mV 600 Output Voltage Range1 300 AVDD − mV Normal mode (LPTIACONx, Bits[4:3] = 00), 400 sink and source 750 μA 300 AVDD − mV High current mode (LPTIACONx, Bits[4:3] = 400 01/11), sink and source 3 mA Rev. C | Page 7 of 28 Document Outline FEATURES APPLICATIONS SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION SPECIFICATIONS MICROCONTROLLER ELECTRICAL SPECIFICATIONS RMS NOISE RESOLUTION OF ADC TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION RECOMMENDED CIRCUIT AND COMPONENT VALUES OUTLINE DIMENSIONS ORDERING GUIDE