Datasheet ADuCM3027, ADuCM3029 (Analog Devices) - 6

ADuCM3027/ ADuCM3029 Data Sheet Deep Sleep Modes—VBAT = 3.0 V Table 6. Parameter Min Typ Max Unit Test Conditions/Comments
HIBERNATE MODE VBAT = 3.0V TJ = 25°C 0.75 µA RTC1 and RTC0 disabled, 8 kB SRAM retained, LFXTAL off 0.77 µA RTC1 and RTC0 disabled, 16 kB SRAM retained, LFXTAL off 0.79 µA RTC1 and RTC0 disabled, 24 kB SRAM retained, LFXTAL off 0.81 µA RTC1 and RTC0 disabled, 32 kB SRAM retained, LFXTAL off 0.78 µA RTC1 enabled, 8 kB SRAM retained, LFOSC as source for RTC1 0.83 µA RTC1 enabled, 8 kB SRAM retained, LFXTAL as source for RTC1 0.93 µA RTC1 and RTC0 enabled, 8 kB SRAM retained, LFXTAL as source for RTC1 and RTC0 TJ = 85°C 2.0 6.05 µA RTC1 and RTC0 disabled, 8 kB SRAM retained, LFXTAL off 2.4 6.4 µA RTC1 and RTC0 disabled, 16 kB SRAM retained, LFXTAL off 2.6 6.75 µA RTC1 and RTC0 disabled, 24 kB SRAM retained, LFXTAL off 3.0 7.1 µA RTC1 and RTC0 disabled, 32 kB SRAM retained, LFXTAL off 2.05 6.1 µA RTC1 enabled, 8 kB SRAM retained, LFOSC as source for RTC1 2.1 6.15 µA RTC1 enabled, 8 kB SRAM retained, LFXTAL as source for RTC1 2.25 6.3 µA RTC1 and RTC0 enabled, 8 kB SRAM retained, LFXTAL as source for RTC1 and RTC0 SHUTDOWN MODE1 VBAT = 3.0 V TJ = 25°C 0.31 µA RTC0 enabled, LFXTAL as source for RTC0 0.056 µA RTC0 disabled TJ = 85°C 0.49 1.180 µA RTC0 enabled, LFXTAL as source for RTC0 0.26 0.95 µA RTC0 disabled 1 Buck enable/disable does not affect power consumption. Rev. B | Page 6 of 39 Document Outline Features Applications Functional Block Diagram Revision History General Description Product Highlights Specifications Operating Conditions and Electrical Characteristics Embedded Flash Specifications Power Supply Current Specifications Active Mode Flexi Mode Deep Sleep Modes—VBAT = 3.0 V ADC Specifications System Clocks External Crystal Oscillator Specifications On-Chip RC Oscillator Specifications System Clocks and PLL Specifications Timing Specifications Reset Timing Serial Ports Timing SPI Timing I2C Specifications General-Purpose Port Timing RTC1 (FLEX_RTC) Specifications Timer Pulse-Width Modulation (PWM) Output Cycle Timing Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation ARM Cortex-M3 Processor ARM Cortex-M3 Memory Subsystem Code Region SRAM Region System Region Memory Architecture SRAM Region MMRs (Peripheral Control and Status) Flash Memory Cache Controller System and Integration Features Reset Booting Power Management Power Modes Active Mode Flexi Mode Hibernate Mode Shutdown Mode Security Features Cryptographic Accelerator True Random Number Generator (TRNG) Reliability and Robustness Features ECC Enabled Flash Memory Multiparity Bit Protected SRAM Software Watchdog Cyclic Redundancy Check (CRC) Accelerator Programmable GPIOs Timers General-Purpose Timers Watchdog Timer (WDT) Analog-to-Digital Converter (ADC) Subsystem Clocking Beeper Driver Debug Capability On-Chip Peripheral Features Serial Ports (SPORT) SPI Ports UART Port I2C Development Support Documentation Hardware Software Additional Information Reference Designs MCU Test Conditions Driver Types EEMBC ULPMark™-CP Score GPIO Multiplexing Applications Information About ADuCM3027/ADuCM3029 Silicon Anomalies Functionality Issues Outline Dimensions Ordering Guide