Datasheet LTM4686, LTM4686-1 (Analog Devices) - 9

LTM4686/LTM4686-1
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the specified internal operating temperature range (Note 2). Specified as each individual output channel (Note 4). TA = 25°C, VIN = 12V, RUNn = 5V, FREQUENCY_SWITCH = 500kHz, VOUT_COMMANDn = 1V and VOUT_UV_FAULT_RESPONSEn = TON_MAX_FAULT_RESPONSEn = 0x00 unless otherwise noted. All other command codes configured per factory-default EEPROM settings unless otherwise noted. Tested per Circuit 1, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
θSYNC-θ1 SYNC-to-Channel 1 (Note 15) Phase Relationship, MFR_PWM_CONFIG[2:0] = 011b 120 Deg Lag from Falling Edge MFR_PWM_CONFIG[2:0] = 000b 180 Deg of Sync to Rising Edge MFR_PWM_CONFIG[2:0] = 010b, 10Xb 240 Deg of Top MOSFET (MT1) MFR_PWM_CONFIG[2:0] = 001b 270 Deg Gate MFR_PWM_CONFIG[2:0] = 110b 300 Deg
EEPROM Characteristics
Endurance (Note 13) 0°C ≤ TJ ≤ 85°C During EEPROM Write Operations (Note 3) l 10,000 Cycles Retention (Note 13) TJ < TJ(MAX), with Most Recent EEPROM Write Operation Having l 10 Years Occurred at 0°C ≤ TJ ≤ 85°C (Note 3) Mass_Write Mass Write Operation Execution of STORE_USER_ALL Command, 0°C ≤ TJ ≤ 85°C 440 4100 ms Time (ATE-Tested at TJ = 25°C) (Notes 3, 13)
Digital I/Os
VIH Input High Threshold SCL, SDA, RUNn, GPIOn (Note 15) 1.35 V Voltage SHARE_CLK, WP (Note 15) 1.8 V VIL Input Low Threshold SCL, SDA, RUNn, GPIOn (Note 15) 0.8 V Voltage SHARE_CLK, WP (Note 15) 0.6 V VHYST Input Hysteresis SCL, SDA (Note 15) 80 mV VOL Output Low Voltage SCL, SDA, ALERT, RUNn, GPIOn, SHARE_CLK: ISINK = 3mA l 0.3 0.4 V IOL Input Leakage Current SDA, SCL, ALERT, RUNn: 0V ≤ VPIN ≤ 5.5V l ±5 µA GPIOn and SHARE_CLK: 0V ≤ VPIN ≤ 3.6V l ±2 µA tFILTER Input Digital Filtering RUNn (Note 15) 10 µs GPIOn (Note 15) 3 µs CPIN Input Capacitance SCL, SDA, RUNn, GPIOn, SHARE_CLK, WP (Note 15) 10 pF
PMBus Interface Timing Characteristics
fSMB Serial Bus Operating (Note 15) 10 400 kHz Frequency tBUF Bus Free Time (Note 15) 1.3 μs Between Stop and Start tHD,STA Hold Time After Time Period After Which First Clock Is Generated (Note 15) 0.6 µs Repeated Start Condition tSU,STA Repeated Start (Note 15) 0.6 μs Condition Setup Time tSU,STO Stop Condition Setup (Note 15) 0.6 μs Time tHD,DAT Data Hold Time Receiving Data (Note 15) 0 µs Transmitting Data (Note 15) 0.3 0.9 µs tSU,DAT Data Setup Time Receiving Data (Note 15) 0.1 μs tTIMEOUT_SMB Stuck PMBus Timer Measured from the Last PMBus Start Event: Timeout Block Reads, MFR_CONFIG_ALL[3]=0b (Note 15) 150 ms Non-Block Reads, MFR_CONFIG_ALL[3]=0b (Note 15) 32 ms MFR_CONFIG_ALL[3]=1b (Note 15) 250 ms tLOW Serial Clock Low (Note 15) 1.3 10000 μs Period tHIGH Serial Clock High (Note 15) 0.6 μs Period Rev. B For more information www.analog.com 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Functional Diagram Test Circuits Operation Power Module Introduction Power Module Configurability and Readback Data Time-Averaged and Peak Readback Data Power Module Overview EEPROM Serial Interface Device Addressing Fault Detection and Handling Responses to VOUT and IOUT Faults Responses to Timing Faults Responses to SVIN OV Faults Responses to OT/UT Faults Responses to External Faults Fault Logging Bus Timeout Protection PMBus Command Summary PMBus Commands Applications Information VIN to VOUT Step-Down Ratios Input Capacitors Output Capacitors Light Load Current Operation Switching Frequency and Phase Minimum On-Time Considerations Variable Delay Time, Soft-Start and Output Voltage Ramping Digital Servo Mode Soft Off (Sequenced Off) Undervoltage Lockout Fault Detection and Handling Open-Drain Pins Phase-Locked Loop and Frequency Synchronization RCONFIG Pin-Straps (External Resistor Configuration Pins) Voltage Selection Connecting the USB to the I2C/SMBus/PMBus Controller to the LTM4686 In System LTpowerPlay: An Interactive GUI for Digital Power System Management PMBus Communication and Command Processing Thermal Considerations and Output Current Derating EMI Performance Safety Considerations Layout Checklist/Example Typical Applications Appendix A Similarity Between PMBus, SMBus and I2C 2-Wire Interface Appendix B PMBus Serial Digital Interface Appendix C: PMBus Command Details Addressing and Write Protect General Configuration Registers On/Off/Margin PWM Config Voltage Current Temperature Timing Fault Response Fault Sharing Scratchpad Identification Fault Warning and Status Telemetry NVM (EEPROM) Memory Commands Package Description Package Photographs Package Description Revision History Typical Application Design Resources Related Parts