Datasheet PI4IOE5V9554 (Diodes) - 5
| 制造商 | Diodes |
| 描述 | 2 8-bit I C-Bus and SMBus I/O Port with Interrupt |
| 页数 / 页 | 17 / 5 — PI4IOE5V9554/9554A. Dynamic Characteristics. Standard. Symbol. Parameter. … |
| 文件格式/大小 | PDF / 887 Kb |
| 文件语言 | 英语 |
PI4IOE5V9554/9554A. Dynamic Characteristics. Standard. Symbol. Parameter. Test Conditions. Mode I2C. Fast Mode I2C. Unit. Min. Max
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文件文字版本
PI4IOE5V9554/9554A Dynamic Characteristics
Table 3: Dynamic Characteristics
Standard Symbol Parameter Test Conditions Mode I2C Fast Mode I2C Unit Min Max Min Max
fSCL SCL Clock Frequency — 0 100 0 400 kHz tBUF Bus Free Time Between a STOP and START Condition — 4.7 — 1.3 — μs tHD;STA Hold Time (Repeated) START Condition — 4.0 — 0.6 — μs tSU;STA Setup Time for a Repeated START Condition — 4.7 — 0.6 — μs tSU;STO Setup Time for STOP Condition — 4.0 — 0.6 — μs t [1] VD;ACK Data Valid Acknowledge Time — — 3.45 — 0.9 μs t [2] HD;DAT Data Hold Time — 0 — 0 — ns tVD;DAT Data Valid Time — — 3.45 — 0.9 μs tSU;DAT Data Setup Time — 250 — 100 — ns tLOW LOW Period of the SCL Clock — 4.7 — 1.3 — μs tHIGH HIGH Period of the SCL Clock — 4.0 — 0.6 — μs tf Fall Time of Both SDA and SCL Signals — — 300 — 300 ns tr Rise Time of Both SDA and SCL Signals — — 1000 — 300 ns tSP Pulse Width of Spikes that must be Suppressed by the Input Filter — — 50 — 50 ns
Port Timing
tv(Q) Data Output Valid Time[3] — — 200 — 200 ns tsu(D) Data Input Setup Time — 100 — 100 — ns th(D) Data Input Hold Time — 1 — 1 — μs
Interrupt Timing
tv(INT) Valid Time on pin INT — — 4 — 4 μs trec(INT) Reset Time on pin INT — — 4 — 4 μs
Note:
1. tVD;ACK = time for acknowledgement signal from SCL LOW to SDA (out) LOW. 2. tVD;DAT = minimum time for SDA data out to be valid following SCL LOW. 3. tv(Q) measured from 0.7VCC on SCL to 50% I/O output. PI4IOE5V9554/ PI4IOE5V9554A
www.diodes.com
November 2019 Document Number DS40769 Rev 3 - 2 5 © Diodes Incorporated Document Outline — Supply Voltage fSCL = 400kHz Supply Current — VI = GND fSCL = 0kHz I/O = inputs Standby Current VI = VCC fSCL = 0kHz I/O = inputs Power-on Reset Voltage[1]
Table 3: Dynamic Characteristics
Standard Symbol Parameter Test Conditions Mode I2C Fast Mode I2C Unit Min Max Min Max
fSCL SCL Clock Frequency — 0 100 0 400 kHz tBUF Bus Free Time Between a STOP and START Condition — 4.7 — 1.3 — μs tHD;STA Hold Time (Repeated) START Condition — 4.0 — 0.6 — μs tSU;STA Setup Time for a Repeated START Condition — 4.7 — 0.6 — μs tSU;STO Setup Time for STOP Condition — 4.0 — 0.6 — μs t [1] VD;ACK Data Valid Acknowledge Time — — 3.45 — 0.9 μs t [2] HD;DAT Data Hold Time — 0 — 0 — ns tVD;DAT Data Valid Time — — 3.45 — 0.9 μs tSU;DAT Data Setup Time — 250 — 100 — ns tLOW LOW Period of the SCL Clock — 4.7 — 1.3 — μs tHIGH HIGH Period of the SCL Clock — 4.0 — 0.6 — μs tf Fall Time of Both SDA and SCL Signals — — 300 — 300 ns tr Rise Time of Both SDA and SCL Signals — — 1000 — 300 ns tSP Pulse Width of Spikes that must be Suppressed by the Input Filter — — 50 — 50 ns
Port Timing
tv(Q) Data Output Valid Time[3] — — 200 — 200 ns tsu(D) Data Input Setup Time — 100 — 100 — ns th(D) Data Input Hold Time — 1 — 1 — μs
Interrupt Timing
tv(INT) Valid Time on pin INT — — 4 — 4 μs trec(INT) Reset Time on pin INT — — 4 — 4 μs
Note:
1. tVD;ACK = time for acknowledgement signal from SCL LOW to SDA (out) LOW. 2. tVD;DAT = minimum time for SDA data out to be valid following SCL LOW. 3. tv(Q) measured from 0.7VCC on SCL to 50% I/O output. PI4IOE5V9554/ PI4IOE5V9554A
www.diodes.com
November 2019 Document Number DS40769 Rev 3 - 2 5 © Diodes Incorporated Document Outline — Supply Voltage fSCL = 400kHz Supply Current — VI = GND fSCL = 0kHz I/O = inputs Standby Current VI = VCC fSCL = 0kHz I/O = inputs Power-on Reset Voltage[1]