Datasheet PI4IOE5V9554 (Diodes) - 7

PI4IOE5V9554/9554A Details Description a. Device Address
Following a START condition, the bus master must output the address of the slave it is accessing. The address of the PI4IOE5V9554/54A is shown below. To conserve power, no internal pul up resistors are incorporated on the hardware selectable address pins, and they must be pul ed HIGH or LOW. Table 4: Device Address Byte b7(MSB) b6 b5 b4 b3 b2 b1 b0 PI4IOE5V9554 0 1 0 0 A2 A1 A0 R/W PI4IOE5V9554A 0 1 1 1 A2 A1 A0 R/W Note: Read “1”, Write “0”
b. Register Description i. Command Byte
The command byte is the first byte to fol ow the address byte during a write transmission. It is used as a pointer to determine which of the following registers are written or read. Table 5: Command Byte Command Protocol Function 0 Read Byte Input port register 1 Read/Write Byte Output port register 2 Read/Write Byte Polarity Inversion register 3 Read/Write Byte Configuration register
ii. Register 0: Input Port Register
This register is a read-only port. It reflects the incoming logic levels of the pins, regardless of whether the pin is defined as an input or an output by Register 3. Writes to this register have no effect. The default ‘X’ is determined by the external y applied logic level, which is normally ‘1’ when no external signal external y applied because of the internal pullup resistors. Table 6: Input Port Register Bit 7 6 5 4 3 2 1 0 Symbol I7 I6 I5 I4 I3 I2 I1 I0 PI4IOE5V9554/ PI4IOE5V9554A
www.diodes.com
November 2019 Document Number DS40769 Rev 3 - 2 7 © Diodes Incorporated Document Outline — Supply Voltage fSCL = 400kHz Supply Current — VI = GND fSCL = 0kHz I/O = inputs Standby Current VI = VCC fSCL = 0kHz I/O = inputs Power-on Reset Voltage[1]