Datasheet HIP2210, HIP2211 (Renesas) - 4
| 制造商 | Renesas |
| 描述 | 100V, 3A Source, 4A Sink, High Frequency Half-Bridge Drivers with Tri-Level PWM Input and Adjustable Dead Time |
| 页数 / 页 | 28 / 4 — 1.2. Ordering Information. Tape and Reel. Package. Part Number (Note 4. … |
| 文件格式/大小 | PDF / 608 Kb |
| 文件语言 | 英语 |
1.2. Ordering Information. Tape and Reel. Package. Part Number (Note 4. Part Marking. Temp. Range (°C). (Units) (Note 1
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文件文字版本
link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 HIP2210, HIP2211 1. Overview
1.2 Ordering Information Tape and Reel Package Part Number (Note 4 ) Part Marking Temp. Range (°C) (Units) (Note 1 ) (RoHS Compliant) Pkg. Dwg. #
HIP2210FRTZ (Note 2) HIP221 0FRTZ -40°C to +125°C - 10 Ld 4x4 DFN L10.4x4 HIP2210FRTZ-T (Note 2) 6k HIP2210FRTZ-T7A (Note 2) 250 HIP2211FRTZ (Note 2) HIP221 1FRTZ - 10 Ld 4x4 DFN L10.4x4 HIP2211FRTZ-T (Note 2) 6k HIP2211FRTZ-T7A (Note 2) 250 HIP2211FBZ (Note 3) 2211 FBZ - 8 Ld SOIC M8.15 HIP2211FBZ-T (Note 3) 2.5k HIP2211FBZ-T7A (Note 3) 250 HIP2211FR8Z (Note 2) HIP221 1FR8Z - 8 Ld 4x4 DFN L8.4x4 HIP2211FR8Z-T (Note 2) 6k HIP2211FR8Z-T7A (Note 2) 250 HIP2210EVAL1Z HIP2210 Evaluation Board HIP2211EVAL2Z HIP2211 (SOIC Package) Evaluation Board HIP2211EVAL3Z HIP2211 (10Ld TDFN Package) Evaluation Board
Notes:
1. See TB347 for details about reel specifications. 2. These Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J-STD-020. 3. These Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu-Ag plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J-STD-020. 4. For Moisture Sensitivity Level (MSL), see the HIP2210 and HIP2211 device pages. For more information about MSL, see TB363.
1.3 Pin Configurations
HIP2211FBZ HIP2211FRTZ (8 Ld SOIC) (10 Ld 4x4 TDFN) Top View Top View
VDD 1 8 LO VDD 1 10 LO HB 2 9 HB 2 VSS 7 VSS HO 3 8 EPAD LI HO 3 6 LI HS 4 7 HI HS 4 5 HI NC 5 6 NC
FN9347 Rev.1.01 Page 4 of 27 Jun.23.20 Document Outline Related Literature Features Applications Contents 1. Overview 1.1 Block Diagrams 1.2 Ordering Information 1.3 Pin Configurations 1.4 Pin Descriptions 2. Specifications 2.1 Absolute Maximum Ratings 2.2 Thermal Information 2.3 Recommended Operating Conditions 2.4 Electrical Specifications 2.5 Switching Specifications 2.6 Timing Diagrams 3. Typical Performance Curves 4. Functional Description 4.1 Gate Drive for NMOS Half-Bridge 4.2 Functional Overview 5. Applications Information 5.1 HI/LI Input Control (HIP2211 Only) 5.2 PWM Input Control (HIP2210 Only) 5.3 VREF Input (HIP2210 Only) 5.4 EN Pin (HIP2210 Only) 5.5 Power Sequencing HIP2210 5.6 Selecting the Boot Capacitor Value 5.7 VDD Decoupling Capacitor 5.8 RDT and Dead Time Delay (HIP2210 Only) 5.9 HO and LO Outputs 5.10 Power Dissipation 5.10.1 Gate Power (for the HO and LO Outputs) 5.10.2 Boot Diode Dissipation 5.10.3 Dynamic Operating Current 5.10.4 Total Power Dissipation 5.10.5 Junction Operating Temperature 6. PCB Layout Guidelines 6.1 PCB Layout and EPAD Recommendation 7. Revision History 8. Package Outline Drawings
1.2 Ordering Information Tape and Reel Package Part Number (Note 4 ) Part Marking Temp. Range (°C) (Units) (Note 1 ) (RoHS Compliant) Pkg. Dwg. #
HIP2210FRTZ (Note 2) HIP221 0FRTZ -40°C to +125°C - 10 Ld 4x4 DFN L10.4x4 HIP2210FRTZ-T (Note 2) 6k HIP2210FRTZ-T7A (Note 2) 250 HIP2211FRTZ (Note 2) HIP221 1FRTZ - 10 Ld 4x4 DFN L10.4x4 HIP2211FRTZ-T (Note 2) 6k HIP2211FRTZ-T7A (Note 2) 250 HIP2211FBZ (Note 3) 2211 FBZ - 8 Ld SOIC M8.15 HIP2211FBZ-T (Note 3) 2.5k HIP2211FBZ-T7A (Note 3) 250 HIP2211FR8Z (Note 2) HIP221 1FR8Z - 8 Ld 4x4 DFN L8.4x4 HIP2211FR8Z-T (Note 2) 6k HIP2211FR8Z-T7A (Note 2) 250 HIP2210EVAL1Z HIP2210 Evaluation Board HIP2211EVAL2Z HIP2211 (SOIC Package) Evaluation Board HIP2211EVAL3Z HIP2211 (10Ld TDFN Package) Evaluation Board
Notes:
1. See TB347 for details about reel specifications. 2. These Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J-STD-020. 3. These Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu-Ag plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J-STD-020. 4. For Moisture Sensitivity Level (MSL), see the HIP2210 and HIP2211 device pages. For more information about MSL, see TB363.
1.3 Pin Configurations
HIP2211FBZ HIP2211FRTZ (8 Ld SOIC) (10 Ld 4x4 TDFN) Top View Top View
VDD 1 8 LO VDD 1 10 LO HB 2 9 HB 2 VSS 7 VSS HO 3 8 EPAD LI HO 3 6 LI HS 4 7 HI HS 4 5 HI NC 5 6 NC
FN9347 Rev.1.01 Page 4 of 27 Jun.23.20 Document Outline Related Literature Features Applications Contents 1. Overview 1.1 Block Diagrams 1.2 Ordering Information 1.3 Pin Configurations 1.4 Pin Descriptions 2. Specifications 2.1 Absolute Maximum Ratings 2.2 Thermal Information 2.3 Recommended Operating Conditions 2.4 Electrical Specifications 2.5 Switching Specifications 2.6 Timing Diagrams 3. Typical Performance Curves 4. Functional Description 4.1 Gate Drive for NMOS Half-Bridge 4.2 Functional Overview 5. Applications Information 5.1 HI/LI Input Control (HIP2211 Only) 5.2 PWM Input Control (HIP2210 Only) 5.3 VREF Input (HIP2210 Only) 5.4 EN Pin (HIP2210 Only) 5.5 Power Sequencing HIP2210 5.6 Selecting the Boot Capacitor Value 5.7 VDD Decoupling Capacitor 5.8 RDT and Dead Time Delay (HIP2210 Only) 5.9 HO and LO Outputs 5.10 Power Dissipation 5.10.1 Gate Power (for the HO and LO Outputs) 5.10.2 Boot Diode Dissipation 5.10.3 Dynamic Operating Current 5.10.4 Total Power Dissipation 5.10.5 Junction Operating Temperature 6. PCB Layout Guidelines 6.1 PCB Layout and EPAD Recommendation 7. Revision History 8. Package Outline Drawings