Datasheet ADL5501 (Analog Devices) - 8
| 制造商 | Analog Devices |
| 描述 | 50 MHz to 6 GHz TruPwr Detector |
| 页数 / 页 | 28 / 8 — ADL5501. Parameter Condition. Min. Typ. Max. Unit |
| 修订版 | B |
| 文件格式/大小 | PDF / 2.1 Mb |
| 文件语言 | 英语 |
ADL5501. Parameter Condition. Min. Typ. Max. Unit
该数据表的模型线
文件文字版本
link to page 28 link to page 28 link to page 8 link to page 8 link to page 11 link to page 12 link to page 12 link to page 12 link to page 13 link to page 13 link to page 13 link to page 11
ADL5501 Parameter Condition Min Typ Max Unit
OUTPUT OFFSET No signal at RFIN 50 150 mV ENABLE INTERFACE Pin ENBL Logic Level to Enable Power, High Condition 2.7 V ≤ VS ≤ 5.5 V, −40°C < TA < +85°C 1.8 VPOS V Input Current when High 2.7 V at ENBL, –40°C ≤ TA ≤ +85°C 0.05 0.1 μA Logic Level to Disable Power, Low Condition 2.7 V ≤ VS ≤ 5.5 V, −40°C < TA < +85°C –0.5 +0.5 V Power-Up Response Time5 CFLTR = COUT = open, 0 dBm at RFIN 6 μs CFLTR = 1 nF, COUT = open, 0 dBm at RFIN 21 μs CFLTR = open, COUT = 100 nF, 0 dBm at RFIN 28 μs POWER SUPPLIES Operating Range −40°C < TA < +85°C 2.7 5.5 V Quiescent Current No signal at RFIN6 1.1 mA Total Supply Current When Disabled No signal at RFIN, ENBL input low 0.1 <5 μA 1 The available output swing and, therefore, the dynamic range are altered by the supply voltage; see Figure 8. 2 Error referred to best-fit line at 25°C. 3 Calculated using linear regression. 4 Error referred to delta from 25°C response; see Figure 13, Figure 14, Figure 15, Figure 19, Figure 20, and Figure 21. 5 The response time is measured from 10% to 90% of settling level; see Figure 30. 6 Supply current is input-level dependent; see Figure 6. Rev. B | Page 8 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT DESCRIPTION FILTERING APPLICATIONS INFORMATION BASIC CONNECTIONS OUTPUT SWING LINEARITY INPUT COUPLING USING A SERIES RESISTOR MULTIPLE RF INPUTS SELECTING THE SQUARE-DOMAIN FILTER AND OUTPUT LOW-PASS FILTER POWER CONSUMPTION, ENABLE, AND POWER-ON/POWER-OFF RESPONSE TIME OUTPUT DRIVE CAPABILITY AND BUFFERING VRMS OUTPUT OFFSET DEVICE CALIBRATION AND ERROR CALCULATION CALIBRATION FOR IMPROVED ACCURACY DRIFT OVER A REDUCED TEMPERATURE RANGE OPERATION BELOW 100 MHz EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
ADL5501 Parameter Condition Min Typ Max Unit
OUTPUT OFFSET No signal at RFIN 50 150 mV ENABLE INTERFACE Pin ENBL Logic Level to Enable Power, High Condition 2.7 V ≤ VS ≤ 5.5 V, −40°C < TA < +85°C 1.8 VPOS V Input Current when High 2.7 V at ENBL, –40°C ≤ TA ≤ +85°C 0.05 0.1 μA Logic Level to Disable Power, Low Condition 2.7 V ≤ VS ≤ 5.5 V, −40°C < TA < +85°C –0.5 +0.5 V Power-Up Response Time5 CFLTR = COUT = open, 0 dBm at RFIN 6 μs CFLTR = 1 nF, COUT = open, 0 dBm at RFIN 21 μs CFLTR = open, COUT = 100 nF, 0 dBm at RFIN 28 μs POWER SUPPLIES Operating Range −40°C < TA < +85°C 2.7 5.5 V Quiescent Current No signal at RFIN6 1.1 mA Total Supply Current When Disabled No signal at RFIN, ENBL input low 0.1 <5 μA 1 The available output swing and, therefore, the dynamic range are altered by the supply voltage; see Figure 8. 2 Error referred to best-fit line at 25°C. 3 Calculated using linear regression. 4 Error referred to delta from 25°C response; see Figure 13, Figure 14, Figure 15, Figure 19, Figure 20, and Figure 21. 5 The response time is measured from 10% to 90% of settling level; see Figure 30. 6 Supply current is input-level dependent; see Figure 6. Rev. B | Page 8 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT DESCRIPTION FILTERING APPLICATIONS INFORMATION BASIC CONNECTIONS OUTPUT SWING LINEARITY INPUT COUPLING USING A SERIES RESISTOR MULTIPLE RF INPUTS SELECTING THE SQUARE-DOMAIN FILTER AND OUTPUT LOW-PASS FILTER POWER CONSUMPTION, ENABLE, AND POWER-ON/POWER-OFF RESPONSE TIME OUTPUT DRIVE CAPABILITY AND BUFFERING VRMS OUTPUT OFFSET DEVICE CALIBRATION AND ERROR CALCULATION CALIBRATION FOR IMPROVED ACCURACY DRIFT OVER A REDUCED TEMPERATURE RANGE OPERATION BELOW 100 MHz EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE