Datasheet TB9120AFTG (Toshiba) - 8

TB9120AFTG 7.3 Power supply / control signal input sequence
(1) Start-up VBAT power supply input VBATRSTH=4.7V(typ.) Note 1） BSTBY signal input VccOUT (internal 5V) output VccOUTRHH=4.0V (typ.) Note 2） ENABLE signal input Motor drive outputs OFF (HiZ) ON Note 1） Make sure that VBAT voltage is more than 4.7V before a standby mode is released (BSTBY signal: L→H). Note 2） It takes about 0.5ms at the most from releasing a standby mode to starting up VccOUT. Therefore, ENABLE signal should be input 0.5ms or more later than BSTBY signal. (2) Shutdown VBAT power supply input BSTBY signal input VccOUTRHL=3.8V (typ.) VccOUT (internal 5V) output Note 3） Note 4） ENABLE signal input Motor drive outputs ON OFF（HiZ） Note 3） Make sure that the outputs to drive a motor are switched off by using ENABLE signal input before a standby mode is turned on. Note 4） After BSTBY signal input switched(H→L), pay attention to the fact that It takes 5ms until VccOUT voltage becomes less than 3.8V, in which the internal logic circuit is off. Timing charts may be simplified for explanatory purposes. © 2020 8 2020-05-12 Toshiba Electronic Devices & Storage Corporation