Datasheet ADN8835 (Analog Devices)

Ultracompact, 3 A Thermoelectric Cooler (TEC) Controller Data Sheet ADN8835 FEATURES FUNCTIONAL BLOCK DIAGRAM High efficiency single inductor architecture VLIM/ VDD SD ILIM VTEC ITEC PVINx Integrated low RDSON MOSFETs for the TEC controller TEC voltage and current operation monitoring ADN8835 ERROR No external sense resistor required AMP TEC DRIVER IN1P TEC CURRENT Independent TEC heating and cooling current-limit settings AND VOLTAGE IN1N SENSE AND LIMIT LDR Programmable maximum TEC voltage LINEAR POWER 2.0 MHz (typical) PWM driver switching frequency OUT1 STAGE External synchronization TMPGND COMP Two integrated, zero-drift, rail-to-rail chopper amplifiers AMP IN2P CONTROLLER Compatible with NTC or RTD thermal sensors SW IN2N PWM 2.50 V reference output with 1% accuracy POWER STAGE SFB OUT2 Temperature lock indicator Available in a 36-lead, 6 mm × 6 mm LFCSP VOLTAGE OSCILLATOR APPLICATIONS REFERENCE TEC temperature control
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Optical modules AGND VREF EN/SY PGNDx
14174-
Optical fiber amplifiers
Figure 1.
Optical networking systems Instruments requiring TEC temperature control GENERAL DESCRIPTION
The ADN88351 is a monolithic TEC control er with an integrated The temperature control loop of the ADN8835 is stabilized by TEC control er. It has a linear power stage, a pulse-width PID compensation utilizing the built in, zero-drift chopper modulation (PWM) power stage, and two zero-drift, rail-to-rail amplifiers. The internal 2.50 V reference voltage provides a 1% chopper amplifiers. The linear controller works with the PWM accurate output that biases a thermistor temperature sensing driver to control the internal power MOSFETs in an H bridge bridge as wel as a voltage divider network to program the configuration. By measuring the thermal sensor feedback maximum TEC current and voltage limits for both the heating and voltage and using the integrated operational amplifiers as a cooling modes. With the zero-drift chopper amplifiers, excel ent proportional integral differential (PID) compensator to condition long-term temperature stability is maintained via an autonomous the signal, the ADN8835 drives current through a TEC to settle analog temperature control loop. the temperature of a laser diode or a passive component attached to the TEC module to the programmed target temperature.
Table 1. TEC Family Models Device No. MOSFET Thermal Loop Package
The ADN8835 supports negative temperature coefficient ADN8831 Discrete Digital/analog LFCSP (CP-32-7) (NTC) thermistors as wel as positive temperature coefficient ADN8833 Integrated Digital WLCSP (CB-25-7), (PTC) resistive temperature detectors (RTDs). The target LFCSP (CP-24-15) temperature is set as an analog voltage input either from a ADN8834 Integrated Digital/analog WLCSP (CB-25-7), digital-to-analog converter (DAC) or from an external resistor LFCSP (CP-24-15) divider. ADN8835 Integrated Digital/analog LFCSP (CP-36-5) 1 Product is covered by U.S. Patent No. 6,486,643.
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG PID CONTROL DIGITAL PID CONTROL POWERING THE CONTROLLER ENABLE AND SHUTDOWN OSCILLATOR CLOCK FREQUENCY External Clock Operation Connecting Multiple ADN8835 Devices TEMPERATURE LOCK INDICATOR SOFT START ON POWER-UP TEC VOLTAGE/CURRENT MONITOR Voltage Monitor Current Monitor MAXIMUM TEC VOLTAGE LIMIT Using a Resistor Divider to Set the TEC Voltage Limit MAXIMUM TEC CURRENT LIMIT Using a Resistor Divider to Set the TEC Current Limit APPLICATIONS INFORMATION SIGNAL FLOW THERMISTOR SETUP THERMISTOR AMPLIFIER (CHOPPER 1) PID COMPENSATION AMPLIFIER (CHOPPER 2) MOSFET DRIVER AMPLIFIERS PWM OUTPUT FILTER REQUIREMENTS Inductor Selection Capacitor Selection INPUT CAPACITOR SELECTION POWER DISSIPATION PWM Regulator Power Dissipation Conduction Loss (PCOND) Switching Losses (PSW) Transition Losses (PTRAN) Linear Regulator Power Dissipation THERMAL CONSIDERATION PCB LAYOUT GUIDELINES BLOCK DIAGRAMS AND SIGNAL FLOW GUIDELINES FOR REDUCING NOISE AND MINIMIZING POWER LOSS General PCB Layout Guidelines PWM Power Stage Layout Guidelines Linear Power Stage Layout Guidelines Placing the Thermistor Amplifier and PID Components EXAMPLE PCB LAYOUT USING TWO LAYERS OUTLINE DIMENSIONS ORDERING GUIDE