Datasheet ADN8834 (Analog Devices)

Ultracompact, 1.5 A Thermoelectric Cooler (TEC) Control er Data Sheet ADN8834 FEATURES FUNCTIONAL BLOCK DIAGRAM Patented high efficiency single inductor architecture VLIM/ VDD SD ILIM VTEC ITEC PVIN Integrated low R MOSFETs for the TEC controller DSON TEC voltage and current operation monitoring ERROR No external sense resistor required AMP TEC DRIVER IN1P TEC CURRENT Independent TEC heating and cooling current limit settings AND VOLTAGE IN1N SENSE AND LIMIT Programmable maximum TEC voltage LDR LINEAR POWER 2.0 MHz PWM driver switching frequency OUT1 STAGE External synchronization COMP Two integrated, zero drift, rail-to-rail chopper amplifiers AMP IN2P CONTROLLER Capable of NTC or RTD thermal sensors SW IN2N PWM 2.50 V reference output with 1% accuracy POWER STAGE Temperature lock indicator SFB OUT2 Available in a 25-ball, 2.5 mm × 2.5 mm WLCSP or in a 24-lead, 4 mm × 4 mm LFCSP VOLTAGE OSCILLATOR REFERENCE APPLICATIONS
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TEC temperature control AGND VREF EN/SY PGNDx Optical modules
12954- Figure 1.
Optical fiber amplifiers Optical networking systems Instruments requiring TEC temperature control GENERAL DESCRIPTION
The ADN88341 is a monolithic TEC controller with an integrated The temperature control loop of the ADN8834 is stabilized by TEC controller. It has a linear power stage, a pulse-width PID compensation utilizing the built in, zero drift chopper modulation (PWM) power stage, and two zero-drift, rail-to-rail amplifiers. The internal 2.50 V reference voltage provides a 1% operational amplifiers. The linear controller works with the PWM accurate output that is used to bias a thermistor temperature driver to control the internal power MOSFETs in an H-bridge sensing bridge as wel as a voltage divider network to program configuration. By measuring the thermal sensor feedback the maximum TEC current and voltage limits for both the heating voltage and using the integrated operational amplifiers as a and cooling modes. With the zero drift chopper amplifiers, proportional integral differential (PID) compensator to condition extremely good long-term temperature stability is maintained via the signal, the ADN8834 drives current through a TEC to settle an autonomous analog temperature control loop. the temperature of a laser diode or a passive component attached to the TEC module to the programmed target temperature.
Table 1. TEC Family Models Device No. MOSFET Thermal Loop Package
The ADN8834 supports negative temperature coefficient (NTC) ADN8831 Discrete Digital/analog LFCSP (CP-32-7) thermistors as well as positive temperature coefficient (PTC) ADN8833 Integrated Digital WLCSP (CB-25-7), resistive temperature detectors (RTD). The target temperature is LFCSP (CP-24-15) set as an analog voltage input either from a digital-to-analog ADN8834 Integrated Digital/analog WLCSP (CB-25-7), converter (DAC) or from an external resistor divider. LFCSP (CP-24-15) 1 Product is covered by U.S. Patent No. 6,486,643.
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Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Detailed Functional Block Diagram Theory of Operation Analog PID Control Digital PID Control Powering the Controller Enable and Shutdown Oscillator Clock Frequency External Clock Operation Connecting Multiple ADN8834 Devices Temperature Lock Indicator (LFCSP Only) Soft Start on Power-Up TEC Voltage/Current Monitor Voltage Monitor Current Monitor Maximum TEC Voltage Limit Using a Resistor Divider to Set the TEC Voltage Limit Maximum TEC Current Limit Using a Resistor Divider to Set the TEC Current Limit Applications Information Signal Flow Thermistor Setup Thermistor Amplifier (Chopper 1) PID Compensation Amplifier (Chopper 2) MOSFET Driver Amplifiers PWM Output Filter Requirements Inductor Selection Capacitor Selection Input Capacitor Selection Power Dissipation PWM Regulator Power Dissipation Conduction Loss (PCOND) Switching Loss (PSW) Transition Loss (PTRAN) Linear Regulator Power Dissipation PCB Layout Guidelines Block Diagrams and Signal Flow Guidelines for Reducing Noise and Minimizing Power Loss General PCB Layout Guidelines PWM Power Stage Layout Guidelines Linear Power Stage Layout Guidelines Placing the Thermistor Amplifier and PID Components Example PCB Layout Using Two Layers Outline Dimensions Ordering Guide