link to page 11 link to page 11 Data SheetADN8831TYPICAL PERFORMANCE CHARACTERISTICS360SYNCI/SD = 1MHz TA = 25°C300VDD = 3V) IV240rees)/DegSPGATESNGATE(1V(DET 180GIFAHT LS EO V120THASA = 25°CPVDD = 5V60 07 004 0 3- 3- 66 0466 04 010ns/DIV00.40.81.21.62.02.4VPHASE (V) Figure 4. SPGATE and SNGATE Rise Time Using Circuit Shown Figure 12 Figure 7. Clock Phase Shift vs. Phase Voltage 2.485VDD = 5V2.480IV) DSNGATESPGATE)(1V/VE(GF 2.475ARETVL VOTA = 25°CV2.470DD = 5V 005 008 3- 3- 66 66 04 04 2.46510ns/DIV–40–1510356085TEMPERATURE (°C) Figure 5. SNGATE and SPGATE Fall Time Using Circuit Shown in Figure 12 Figure 8. VREF vs. Temperature 3601000SYNCI/SD = 1MHz TVDD = 5VA = 25°CT300 VA = 25°CDD = 5Vz) 800(kH240rees) egNCY E 600(DUTQ180IF HRE FS E400NG120HASCHIPIT W S 20060 06 0 009 3- 66 63- 04 0 046 000.40.81.21.62.02.402505007501000VPHASE (V)RFREQ (kΩ) Figure 6. Clock Phase Shift vs. Phase Voltage Figure 9. Switching Frequency vs. RFREQ Rev. C | Page 9 of 18 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY DETAILED BLOCK DIAGRAM SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION OSCILLATOR CLOCK FREQUENCY Free-Run Operation External Clock Operation Connecting Multiple ADN8831 Devices OSCILLATOR CLOCK PHASE TEMPERATURE LOCK INDICATOR SOFT START ON POWER-UP SHUTDOWN MODE STANDBY MODE TEC VOLTAGE/CURRENT MONITOR Voltage Monitor Current Monitor MAXIMUM TEC VOLTAGE LIMIT Using a DAC Using a Resistor Divider MAXIMUM TEC CURRENT LIMIT APPLICATIONS INFORMATION SIGNAL FLOW THERMISTOR SETUP THERMISTOR AMPLIFIER (Chop1) PID COMPENSATION AMPLIFIER (Chop2) MOSFET DRIVER AMPLIFIER OUTLINE DIMENSIONS ORDERING GUIDE