Preliminary Datasheet MB85RS4MTY (Fujitsu) - 2
| 制造商 | Fujitsu |
| 描述 | Memory FRAM 4M (512 K х 8) Bit SPI |
| 页数 / 页 | 39 / 2 — MB85RS4MTY. PIN ASSIGNMENT. PIN FUNCTIONAL DESCRIPTIONS. Pin No. Pin … |
| 文件格式/大小 | PDF / 2.6 Mb |
| 文件语言 | 英语 |
MB85RS4MTY. PIN ASSIGNMENT. PIN FUNCTIONAL DESCRIPTIONS. Pin No. Pin Name. Functional description
该数据表的模型线
文件文字版本
MB85RS4MTY PIN ASSIGNMENT
(TOP VIEW) (TOP VIEW) CS 1 8 VDD CS 1 8 VDD SO 2 7 RESET SO 2 7 RESET DIE PAD 3 6 SCK WP 3 6 SCK WP VSS 4 5 SI VSS 4 5 SI (8-pin plastic SOP 208mil) (8-pin plastic DFN 5mm 6mm)
PIN FUNCTIONAL DESCRIPTIONS Pin No. Pin Name Functional description
Chip Select pin This is an input pin to make chips select. When CS is “H” level, device is in deselect 1 CS (standby) status and SO becomes High-Z. Inputs from other pins are ignored for this time. When CS is “L” level, device is in select (active) status. CS has to be “L” level before inputting op-code. Write Protect pin This is a pin to control writing to a status register. The writing of status register (see “ 3 WP STATUS REGISTER”) is protected in related with WP and WPEN. See “ WRITING PROTECT” for detail. RESET pin 7 RESET This is an input pin to make chip reset. When RESET is “L” level, device is reset and SPI interface status is initialized. Serial Clock pin 6 SCK This is a clock input pin to input/output serial data. SI is loaded synchronously to a rising edge, SO is output synchronously to a falling edge. Serial Data Input pin 5 SI This is an input pin of serial data. This inputs op-code, address, and writing data. Serial Data Output pin 2 SO This is an output pin of serial data. Reading data of FRAM memory cell array and status register data are output. This is High-Z during standby. 8 VDD Supply Voltage pin 4 VSS Ground pin DIE PAD It is allowed for the DIE PAD on the bottom of the DFN8 package to be floating (no con- nection to anything) or to be connected to VSS. 2 DS501-00065-0v1-E Document Outline DESCRIPTION FEATURES PIN ASSIGNMENT PIN FUNCTIONAL DESCRIPTIONS BLOCK DIAGRAM SPI MODE SERIAL PERIPHERAL INTERFACE (SPI) STATUS REGISTER OP-CODE COMMAND BLOCK PROTECT WRITING PROTECT ABSOLUTE MAXIMUM RATINGS RECOMMENDED OPERATING CONDITIONS ELECTRICAL CHARACTERISTICS 1. DC Characteristics 2. AC Characteristics 3. Pin Capacitance TIMING DIAGRAM POWER ON/OFF SEQUENCE FRAM CHARACTERISTICS NOTE ON USE ESD AND LATCH-UP REFLOW CONDITIONS AND FLOOR LIFE Current status on Contained Restricted Substances ORDERING INFORMATION PACKAGE DIMENSION MARKING (Example) PACKING INFORMATION 1. Tube 2. Emboss Tape
(TOP VIEW) (TOP VIEW) CS 1 8 VDD CS 1 8 VDD SO 2 7 RESET SO 2 7 RESET DIE PAD 3 6 SCK WP 3 6 SCK WP VSS 4 5 SI VSS 4 5 SI (8-pin plastic SOP 208mil) (8-pin plastic DFN 5mm 6mm)
PIN FUNCTIONAL DESCRIPTIONS Pin No. Pin Name Functional description
Chip Select pin This is an input pin to make chips select. When CS is “H” level, device is in deselect 1 CS (standby) status and SO becomes High-Z. Inputs from other pins are ignored for this time. When CS is “L” level, device is in select (active) status. CS has to be “L” level before inputting op-code. Write Protect pin This is a pin to control writing to a status register. The writing of status register (see “ 3 WP STATUS REGISTER”) is protected in related with WP and WPEN. See “ WRITING PROTECT” for detail. RESET pin 7 RESET This is an input pin to make chip reset. When RESET is “L” level, device is reset and SPI interface status is initialized. Serial Clock pin 6 SCK This is a clock input pin to input/output serial data. SI is loaded synchronously to a rising edge, SO is output synchronously to a falling edge. Serial Data Input pin 5 SI This is an input pin of serial data. This inputs op-code, address, and writing data. Serial Data Output pin 2 SO This is an output pin of serial data. Reading data of FRAM memory cell array and status register data are output. This is High-Z during standby. 8 VDD Supply Voltage pin 4 VSS Ground pin DIE PAD It is allowed for the DIE PAD on the bottom of the DFN8 package to be floating (no con- nection to anything) or to be connected to VSS. 2 DS501-00065-0v1-E Document Outline DESCRIPTION FEATURES PIN ASSIGNMENT PIN FUNCTIONAL DESCRIPTIONS BLOCK DIAGRAM SPI MODE SERIAL PERIPHERAL INTERFACE (SPI) STATUS REGISTER OP-CODE COMMAND BLOCK PROTECT WRITING PROTECT ABSOLUTE MAXIMUM RATINGS RECOMMENDED OPERATING CONDITIONS ELECTRICAL CHARACTERISTICS 1. DC Characteristics 2. AC Characteristics 3. Pin Capacitance TIMING DIAGRAM POWER ON/OFF SEQUENCE FRAM CHARACTERISTICS NOTE ON USE ESD AND LATCH-UP REFLOW CONDITIONS AND FLOOR LIFE Current status on Contained Restricted Substances ORDERING INFORMATION PACKAGE DIMENSION MARKING (Example) PACKING INFORMATION 1. Tube 2. Emboss Tape