Datasheet BM62, BM64 (Microchip)

BM62/64 Bluetooth® Stereo Audio Module Features
• Supports Serial Copy Management System (SCMS-T) content protection • Qualified for Bluetooth v5.0 specification • Supports A2DP 1.3, AVRCP 1.6, HFP 1.6, HSP
FIGURE 1: BM62 MODULE
1.2 and SPP 1.2 • Supports Bluetooth 5.0 dual-mode (BDR/EDR/ BLE) specifications • Stand-alone module with on-board PCB antenna and Bluetooth stack • Supports high resolution up to 24-bit, 96 kHz audio data format • Supports Bluetooth Low Energy data rate up to 1Mbits/s • Supports connection of two hosts with HFP/A2DP profiles simultaneously • Transparent UART mode for seamless serial data over UART interface • Supports virtual UART communication between host MCU and smartphone applications by Blue- tooth SPP or BLE link • Easy to configure with Windows® GUI or directly
FIGURE 2: BM64 MODULE
by external MCU • Supports firmware field upgrade • Supports one microphone • Compact surface mount module: - BM62: 29 x 15 x 2.5 mm - BM64: 32 x 15 x 2.5 mm • Castellated surface mount pads for easy and reliable host PCB mounting • RoHS compliant • Ideal for portable battery-operated devices • Internal battery regulator circuitry
DSP Audio Processing
• Supports 64 kbps A-Law, -Law PCM format/ Continuous Variable Slope Delta (CVSD) modula- tion for SCO channel operation • Supports 8/16 kHz noise suppression
Audio Codec
• Supports 8/16 kHz echo cancellation • Supports Modified Sub-Band Coding (MSBC) • Sub-band Coding (SBC) and optional Advanced decoder for wide band speech Audio Coding (AAC) decoding • Built-in High Definition Clean Audio (HCA) algo- • 20-bit Digital-to-Analog Converter (DAC) with rithms for both narrow band and wide band 98 dB SNR speech processing • 16-bit Analog-to-Digital Converter (ADC) with • Packet loss concealment (PLC) 92 dB SNR • Built-in audio effect algorithms to enhance audio • Supports up to 24-bit, 96 kHz I2S digital audio streaming (BM64 only)  2017-2020 Microchip Technology Inc.
Advanced
DS60001403F-Page 1 Document Outline Features DSP Audio Processing FIGURE 1: BM62 MODULE FIGURE 2: BM64 MODULE Audio Codec Peripherals RF/Analog HCI Interface MAC/Baseband Processor Operating Condition Compliance Applications Description Table of Contents Most Current Data Sheet Errata Customer Notification System 1.0 Device Overview FIGURE 1-1: SINGLE SPEAKER Application using BM62 Module FIGURE 1-2: SINGLE SPEAKER Application Using BM64 Module FIGURE 1-3: Multi-speaker application USING BM64 Module TABLE 1-1: BM62/64 KEY FEATURES FIGURE 1-4: BM62 Module PIN Diagram TABLE 1-2: BM62 Module PIN Description (Continued) FIGURE 1-5: bm64 Module pin diagram TABLE 1-3: BM64 Module PIN Description (Continued) 2.0 Audio 2.1 Digital Signal Processor FIGURE 2-1: Speech Signal Processing FIGURE 2-2: Audio Signal Processing 2.2 Codec FIGURE 2-3: CODEC DAC Dynamic Range FIGURE 2-4: CODEC DAC THD+N Versus input power FIGURE 2-5: CODEC DAC FREQUENCY RESPONSE (CAPLESS MODE) FIGURE 2-6: CODEC DAC Frequency response (Single-EndED mode) 2.3 Auxiliary Port 2.4 Analog Speaker Output FIGURE 2-7: Analog speaker output Capless MODE FIGURE 2-8: Analog speaker output SINGLE-ENDed MODE 3.0 Transceiver 3.1 Transmitter 3.2 Receiver 3.3 Synthesizer 3.4 Modem 3.5 Adaptive Frequency Hopping (AFH) 4.0 Power Management Unit 4.1 Charging a Battery FIGURE 4-1: BATTERY CHARGING CURVE 4.2 Voltage Monitoring 4.3 LED Drivers FIGURE 4-2: LED Drivers 4.4 Under Voltage Protection (Software Dependent UVP) 4.5 Ambient Detection FIGURE 4-3: Ambient Detection 5.0 Application Information 5.1 Power Supply FIGURE 5-1: Power Tree DIAGRAM 5.2 Host MCU Interface FIGURE 5-2: HOST MCU INTERFACE OVER UART FIGURE 5-3: Power-On/Off Sequence FIGURE 5-4: TIMING SEQUENCE OF RX INDICATION AFTER POWER-ON State FIGURE 5-5: TIMING SEQUENCE OF POWER-OFF State FIGURE 5-6: TIMING SEQUENCE OF POWER-ON (NACK) FIGURE 5-7: RESET TIMING SEQUENCE IN NO RESPONSE FROM MODULE TO HOST MCU FIGURE 5-8: TIMING SEQUENCE OF POWER DROP PROTECTION 5.2.1 Device FW Upgrade (DFU) FIGURE 5-9: Timing Diagram of Application Mode to DFU Mode FIGURE 5-10: Timing Diagram of DFU Mode to Application Mode 5.3 I2S Mode Application FIGURE 5-11: BM64 MODULE IN I2S MASTER MODE FIGURE 5-12: BM64 MODULE IN I2S SLAVE MODE 5.4 Reset 5.5 External Configuration and Programming FIGURE 5-13: EXTERNAL PROGRAMMING HEADER CONNECTIONS TABLE 5-1: SYSTEM CONFIGURATION I/O PIN SETTINGS 5.6 Reference Circuit FIGURE 5-14: BM62 REFERENCE CIRCUIT FOR STEREO HEADSET APPLICATION FIGURE 5-15: BM62 REFERENCE CIRCUIT FOR STEREO HEADSET APPLICATION FIGURE 5-16: BM62 REFERENCE CIRCUIT FOR STEREO HEADSET APPLICATION FIGURE 5-17: BM62 REFERENCE CIRCUIT FOR STEREO HEADSET APPLICATION FIGURE 5-18: BM64 REFERENCE CIRCUIT FOR STEREO HEADSET APPLICATION FIGURE 5-19: BM64 REFERENCE CIRCUIT FOR STEREO HEADSET APPLICATION FIGURE 5-20: BM64 REFERENCE CIRCUIT FOR STEREO HEADSET APPLICATION FIGURE 5-21: BM64 REFERENCE CIRCUIT FOR STEREO HEADSET APPLICATION 6.0 Printed Antenna Information 6.1 Antenna Radiation Pattern FIGURE 6-1: RECOMMENDED KEEPOUT AREA FOR PCB ANTENNA FIGURE 6-2: PCB ANTENNA 3D RADIATION PATTERN at 2441 MHz TABLE 6-1: BM62/64 PCB ANTENNA CHARACTERISTICS 6.2 Module Placement Guidelines FIGURE 6-3: MODULE PLACEMENT GUIDELINES FIGURE 6-4: GND PLANE ON MAIN APPLICATION BOARD 7.0 Physical Dimensions FIGURE 7-1: BM62 Module PCB DIMENSION FIGURE 7-2: BM64 Module PCB DIMENSION FIGURE 7-3: RECOMMENDED BM62 Module PCB FOOTPRINT FIGURE 7-4: RECOMMENDED BM64 Module PCB FOOTPRINT 8.0 Electrical Characteristics TABLE 8-1: RECOMMENDED OPERATING CONDITION TABLE 8-2: I/O AND RESET LEVEL TABLE 8-3: BATTERY CHARGER TABLE 8-4: LED DRIVER TABLE 8-5: AUDIO CODEC ANALOG TO DIGITAL CONVERTER TABLE 8-6: AUDIO CODEC DIGITAL TO ANALOG CONVERTER TABLE 8-7: TRANSMITTER SECTION FOR BDR AND EDR TABLE 8-8: RECEIVER SECTION FOR BDR AND EDR TABLE 8-9: BM62 SYSTEM CURRENT CONSUMPTION TABLE 8-10: BM64SPKS1MC2 EMBEDDED MODE (WITHOUT EXTERNAL MCU) SYSTEM CURRENT CONSUMPTION TABLE 8-11: BM64SPKS1MC2 HOST MCU MODE SYSTEM CURRENT CONSUMPTION 8.1 Timing specifications FIGURE 8-1: TIMING DIAGRAM FOR I2S MODES (MASTER/SLAVE) FIGURE 8-2: TIMING DIAGRAM FOR PCM MODES (MASTER/SLAVE) FIGURE 8-3: AUDIO INTERFACE TIMING Diagram TABLE 8-12: AUDIO INTERFACE TIMING Specifications 9.0 Soldering Recommendations FIGURE 9-1: REFLOW PROFILE 10.0 Ordering Information TABLE 10-1: BM62/64 Module ORDERING INFORMATION Appendix A: Certification Notices TABLE A-1: EUROPEAN COMPLIANCE TESTING (BM62SPKS1MC2/BM62SPKA1MC2) TABLE A-2: EUROPEAN COMPLIANCE TESTING (BM64SPKS1MC1/BM64SPKA1MC1) TABLE A-3: EUROPEAN COMPLIANCE TESTING (BM64SPKS1MC2/BM64SPKA1MC2) Appendix B: Revision History Revision A (May 2016) Revision B (December 2016) TABLE B-1: major Section Updates Revision C (October 2017) TABLE C-1: major Section Updates Revision D (March 2018) TABLE D-1: major Section Updates Revision E (September 2018) TABLE E-1: major Section Updates Revision F (June 2020) TABLE F-1: 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