Datasheet RV1S9353A (Renesas) - 5

RV1S9353A Chapter Title ELECTRICAL CHARACTERISTICS (TYP.: TA = 25C, VIN = VIN = 0 V, VDD1 = VDD2 = 5 V, MIN., MAX.: refer to RECOMMENDED OPERATING CONDITIONS, unless otherwise specified) Parameter Symbol Conditions MIN. TYP. MAX. Unit Input Supply Current IDD1 VIN = -320 ~ +320 mV 11.5 15.5 mA VDD2 = 5 V 5 8 mA Output Supply Current IDD2 VDD2 = 3.3 V 4.5 7 mA Input Bias Current IIN VDD1 = VDD2 = 5 V, VIN+ = 0 V 2.5 A Low Level Saturated Output Voltage VOL IOUT = 1.6 mA 0.6 V High Level Saturated Output Voltage VOH IOUT = 200 A VDD2 -0.6 VDD2 -0.1 V Output Short-circuit Current |IOSC| VOUT = VDD2 or VOUT = GND2 18 40 mA Equivalent Input Resistance RIN VIN+ or VIN- single ended 500 k Output Clock Frequency fCLK 9 10 11 MHz Isolation Resistance RI-O VI-O = 1 kVDC, TA = 25C 1011 Isolation Capacitance CI-O f = 1 MHz 0.7 pF Data Hold Time *1 tHDDAT 10 ns Common Mode Transient Immunity *2 CMR VCM = 1 kV, TA = 25C 15 25 kV/s *1 The data hold time (tHDDAT) is that the data (MDAT) wil stay stable following the rising edge of the clock (MCLK). tHDDAT is shown in the below timing chart. Fig. Timing Chart *2 Common Mode Transient Immunity (CMR) is specified by the rate of rise / fall of a pulse applied between GND1 on the input side and GND2 on the output side (pins 4 and 5) by using the circuit shown in Fig. 6 CMR Test Circuit. CMR is defined at the point that clock signals are corrupted. R08DS0174EJ0100 Rev.1.00 Page 5 of 19 Mar 23, 2020