Datasheet ADCMP671 (Analog Devices) - 8

ADCMP671 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS PWRGD 1 6 OV ADCMP671 GND 2 5 V TOP VIEW DD (Not to Scale)
3 00
INH 3 4 INL
0- 16 10 Figure 3. Pin Configuration
Table 7. Pin Function Descriptions Pin No. Mnemonic Description
1 PWRGD Open-Drain Active High Power Good Output. It asserts when the input falls within the UV and OV window, for example, INH high and INL low. 2 GND Ground. 3 INH Monitors for Supply Undervoltage Fault Through an External Resistor Divider Network. It is internally connected to the noninverting input of a comparator. The other input of the comparator is connected to a 400 mV reference. 4 INL Monitors for Supply Overvoltage Fault Through an External Resistor Divider Network. It is internally connected to the inverting input of a comparator. The other input of the comparator is connected to a 400 mV reference. 5 VDD Power Supply Pin. 6 OV Open-Drain Output Active Low Overvoltage Fault Indication Output. It asserts when there is an overvoltage fault, for example, INL high. Rev. 0 | Page 8 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION COMPARATORS AND INTERNAL REFERENCE POWER SUPPLY INPUTS HYSTERESIS VOLTAGE MONITORING SCHEME OUTPUTS OUTLINE DIMENSIONS ORDERING GUIDE