Datasheet ADCMP603 (Analog Devices)

Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator Data Sheet ADCMP603 FEATURES FUNCTIONAL BLOCK DIAGRAM Fully specified rail to rail at V VCCI VCCO CC = 2.5 V to 5.5 V Input common-mode voltage from −0.2 V to VCC + 0.2 V Low glitch CMOS-/TTL-compatible output stage Complementary outputs VP NONINVERTING INPUT 3.5 ns propagation delay Q OUTPUT ADCMP603 TTL 12 mW at 3.3 V Q OUTPUT Shutdown pin VN INVERTING INPUT Single-pin control for programmable hysteresis and latch Power supply rejection > 50 dB −40°C to +125°C operation
001
LE/HYS INPUT S
05915-
APPLICATIONS DN INPUT
Figure 1.
High speed instrumentation Clock and data signal restoration Logic level shifting or translation Pulse spectroscopy High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Pulse-width modulators Current-/voltage-controlled oscillators Automatic test equipment (ATE) GENERAL DESCRIPTION
The ADCMP603 is a very fast comparator fabricated on The device passes 4.5 kV HBM ESD testing and the absolute XFCB2, an Analog Devices, Inc., proprietary process. This maximum ratings include current limits for all pins. comparator is exceptionally versatile and easy to use. Features The complementary TTL-/CMOS-compatible output stage is include an input range from VEE − 0.5 V to VCC + 0.2 V, low noise designed to drive up to 5 pF with ful timing specs and to degrade complementary TTL-/CMOS-compatible output drivers, latch in a graceful and linear fashion as additional capacitance is added. inputs with adjustable hysteresis and a shutdown input. The comparator input stage offers robust protection against large The device offers 3.5 ns propagation delay with 10 mV input overdrive, and the outputs do not phase reverse when the overdrive on 4 mA typical supply current. valid input signal range is exceeded. Latch and programmable A flexible power supply scheme allows the device to operate hysteresis features are also provided with a unique single-pin with a single +2.5 V positive supply and a −0.5 V to +2.8 V control option. input signal range up to a +5.5 V positive supply with a −0.5 V The ADCMP603 is available in a 12-lead LFCSP. to +5.8 V input signal range. Split input/output supplies with no sequencing restrictions support a wide input signal range while still allowing independent output swing control and power savings.
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS TIMING INFORMATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION POWER/GROUND LAYOUT AND BYPASSING TTL-/CMOS-COMPATIBLE OUTPUT STAGE USING/DISABLING THE LATCH FEATURE OPTIMIZING PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS CROSSOVER BIAS POINT MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE