Datasheet ADCMP580, ADCMP581, ADCMP582 (Analog Devices) - 2
| 制造商 | Analog Devices |
| 描述 | Ultrafast SiGe Voltage Comparators |
| 页数 / 页 | 16 / 2 — ADCMP580/ADCMP581/ADCMP582. Data Sheet. TABLE OF CONTENTS. REVISION … |
| 修订版 | B |
| 文件格式/大小 | PDF / 412 Kb |
| 文件语言 | 英语 |
ADCMP580/ADCMP581/ADCMP582. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 4/16—Rev. A to Rev. B. 8/07—Rev. 0 to Rev. A
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ADCMP580/ADCMP581/ADCMP582 Data Sheet TABLE OF CONTENTS
Features .. 1 Applications Information .. 12 Applications ... 1 Power/Ground Layout and Bypassing ... 12 Functional Block Diagram .. 1 ADCMP580/ADCMP581/ADCMP582 Family of Output General Description ... 1 Stages .. 12 Revision History ... 2 Using/Disabling the Latch Feature ... 12 Specifications ... 3 Optimizing High Speed Performance ... 13 Timing Information ... 5 Comparator Propagation Delay Dispersion ... 13 Absolute Maximum Ratings .. 6 Comparator Hysteresis .. 14 Thermal Considerations .. 6 Minimum Input Slew Rate Requirement .. 14 ESD Caution .. 6 Outline Dimensions ... 15 Pin Configurations and Function Descriptions ... 7 Ordering Guide .. 15 Typical Performance Characteristics ... 9 Typical Application Circuits .. 11
REVISION HISTORY 4/16—Rev. A to Rev. B
Deleted Figure 4; Renumbered Sequentially... 7 Changes to Figure 3 and Table 4 ... 7 Changes to Figure 4 .. 8 Added Table 5; Renumbered Sequential y .. 8 Updated Outline Dimensions ... 14 Changes to Ordering Guide .. 14
8/07—Rev. 0 to Rev. A
Changes to Figure 1 .. 1 Changes to Table 4 .. 7 Changes to Figure 9 .. 8 Changes to Figure 21, Figure 22, and Figure 23 ... 10 Changes to Using/Disabling the Latch Feature .. 11 Changes to Comparator Hysteresis Section and Figure 29 ... 13 Changes to Ordering Guide .. 14
7/05—Revision 0: Initial Version
Rev. B | Page 2 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING INFORMATION ABSOLUTE MAXIMUM RATINGS THERMAL CONSIDERATIONS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TYPICAL APPLICATION CIRCUITS APPLICATIONS INFORMATION POWER/GROUND LAYOUT AND BYPASSING ADCMP580/ADCMP581/ADCMP582 FAMILY OF OUTPUT STAGES USING/DISABLING THE LATCH FEATURE OPTIMIZING HIGH SPEED PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS MINIMUM INPUT SLEW RATE REQUIREMENT OUTLINE DIMENSIONS ORDERING GUIDE NOTES
ADCMP580/ADCMP581/ADCMP582 Data Sheet TABLE OF CONTENTS
Features .. 1 Applications Information .. 12 Applications ... 1 Power/Ground Layout and Bypassing ... 12 Functional Block Diagram .. 1 ADCMP580/ADCMP581/ADCMP582 Family of Output General Description ... 1 Stages .. 12 Revision History ... 2 Using/Disabling the Latch Feature ... 12 Specifications ... 3 Optimizing High Speed Performance ... 13 Timing Information ... 5 Comparator Propagation Delay Dispersion ... 13 Absolute Maximum Ratings .. 6 Comparator Hysteresis .. 14 Thermal Considerations .. 6 Minimum Input Slew Rate Requirement .. 14 ESD Caution .. 6 Outline Dimensions ... 15 Pin Configurations and Function Descriptions ... 7 Ordering Guide .. 15 Typical Performance Characteristics ... 9 Typical Application Circuits .. 11
REVISION HISTORY 4/16—Rev. A to Rev. B
Deleted Figure 4; Renumbered Sequentially... 7 Changes to Figure 3 and Table 4 ... 7 Changes to Figure 4 .. 8 Added Table 5; Renumbered Sequential y .. 8 Updated Outline Dimensions ... 14 Changes to Ordering Guide .. 14
8/07—Rev. 0 to Rev. A
Changes to Figure 1 .. 1 Changes to Table 4 .. 7 Changes to Figure 9 .. 8 Changes to Figure 21, Figure 22, and Figure 23 ... 10 Changes to Using/Disabling the Latch Feature .. 11 Changes to Comparator Hysteresis Section and Figure 29 ... 13 Changes to Ordering Guide .. 14
7/05—Revision 0: Initial Version
Rev. B | Page 2 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING INFORMATION ABSOLUTE MAXIMUM RATINGS THERMAL CONSIDERATIONS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TYPICAL APPLICATION CIRCUITS APPLICATIONS INFORMATION POWER/GROUND LAYOUT AND BYPASSING ADCMP580/ADCMP581/ADCMP582 FAMILY OF OUTPUT STAGES USING/DISABLING THE LATCH FEATURE OPTIMIZING HIGH SPEED PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS MINIMUM INPUT SLEW RATE REQUIREMENT OUTLINE DIMENSIONS ORDERING GUIDE NOTES