Datasheet HMC974 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | 10 GHz, High Speed Window Comparator |
| 页数 / 页 | 12 / 10 — HMC974LC3C. Data Sheet. APPLICATIONS INFORMATION EVALUATION BOARD. Table … |
| 修订版 | E |
| 文件格式/大小 | PDF / 351 Kb |
| 文件语言 | 英语 |
HMC974LC3C. Data Sheet. APPLICATIONS INFORMATION EVALUATION BOARD. Table 5. Bill of Materials. Reference Designator. Description
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文件文字版本
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HMC974LC3C Data Sheet APPLICATIONS INFORMATION EVALUATION BOARD Table 5. Bill of Materials
The HMC974LC3C evaluation printed circuit board (PCB)
Reference Designator Description
must use RF circuit design techniques. Signal lines must have J1 Eight-position vertical header 50 Ω impedance while the package ground leads must connect J2 to J7 K connector, SRI directly to the ground plane of the PCB. The exposed metal J8 Terminal strip, single row, 3-pin package base must connect to VEE. Ensure the top and bottom JP1, JP2 Two position vertical header ground planes connect together with via holes. The evaluation C1 to C3, C5, C6, C8 to C10, 100 pF capacitor, 0402 PCB shown in Figure 13 is available from Analog Devices, Inc., C15 upon request. C4, C7, C11 330 pF capacitor, 0402 C12 to C14 4.7 μF tantalum capacitor Figure 14 shows the EVAL-HMC974LC3C schematic. Figure 15 TP1 to TP4 DC pin shows the typical application circuit. U1 HMC974LC3C window comparator PCB EVAL-HMC974LC3C evaluation board, circuit board material is either Rogers 4350 or Arlon 25FR 3 1 0 63- 148 Figure 13. Evaluation Printed Circuit Board Rev. E | Page 10 of 12 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER SEQUENCING APPLICATIONS INFORMATION EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
HMC974LC3C Data Sheet APPLICATIONS INFORMATION EVALUATION BOARD Table 5. Bill of Materials
The HMC974LC3C evaluation printed circuit board (PCB)
Reference Designator Description
must use RF circuit design techniques. Signal lines must have J1 Eight-position vertical header 50 Ω impedance while the package ground leads must connect J2 to J7 K connector, SRI directly to the ground plane of the PCB. The exposed metal J8 Terminal strip, single row, 3-pin package base must connect to VEE. Ensure the top and bottom JP1, JP2 Two position vertical header ground planes connect together with via holes. The evaluation C1 to C3, C5, C6, C8 to C10, 100 pF capacitor, 0402 PCB shown in Figure 13 is available from Analog Devices, Inc., C15 upon request. C4, C7, C11 330 pF capacitor, 0402 C12 to C14 4.7 μF tantalum capacitor Figure 14 shows the EVAL-HMC974LC3C schematic. Figure 15 TP1 to TP4 DC pin shows the typical application circuit. U1 HMC974LC3C window comparator PCB EVAL-HMC974LC3C evaluation board, circuit board material is either Rogers 4350 or Arlon 25FR 3 1 0 63- 148 Figure 13. Evaluation Printed Circuit Board Rev. E | Page 10 of 12 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER SEQUENCING APPLICATIONS INFORMATION EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE