Datasheet AD8564 (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | Quad 7 ns Single Supply Comparator |
| 页数 / 页 | 12 / 6 — AD8564. TYPICAL PERFORMANCE CHARACTERISTICS. 1.0. 500. 0.8. 400. (mV). G … |
| 修订版 | B |
| 文件格式/大小 | PDF / 275 Kb |
| 文件语言 | 英语 |
AD8564. TYPICAL PERFORMANCE CHARACTERISTICS. 1.0. 500. 0.8. 400. (mV). G A. T 0.6. L 300. AM F. ET S F 0.4. R O 200. IN 0.2. 100. –75. –50. –25. 125. 150
该数据表的模型线
文件文字版本
AD8564 TYPICAL PERFORMANCE CHARACTERISTICS
V+ANA = V+DIG = 5 V, V–ANA = 0 V, TA = 25°C, unless otherwise noted.
1.0 500 0.8 400 (mV) RS E IE G A IF T 0.6 L 300 L P VO AM F ET S F 0.4 R O 200 F E O B T M PU NU IN 0.2 100 0 0
04 07
–75 –50 –25 0 25 50 75 100 125 150
0
–5 –4 –3 –2 –1 0 1 2 3 4 5
0 3- 3-
TEMPERATURE (°C)
10 1 10 0
INPUT OFFSET VOLTAGE (mV)
01 Figure 4. Input Offset Voltage vs. Temperature Figure 7. Input Offset Voltage Distribution
0 10 STEPSIZE = 100mV OVERDRIVE = 5mV –1 8 A) s) n (µ tPDHL Y ( NT A –2 L 6 E D tPDLH CURRE TION AS –3 A 4 BI G A UT P O INP PR –4 2 –5
5
0
8
–75 –50 –25 0 25 50 75 100 125 150
00 00 3-
–50 –25 0 25 50 75 100 125
3-
TEMPERATURE (°C)
10 1 10 0
TEMPERATURE (°C)
1 0 Figure 5. Input Bias Current vs. Temperature Figure 8. Propagation Delay, tPDHL/tPDLH vs. Temperature
0 5.0 V+ANA = V+DIG = +5V V–ANA = –5V –1 ) 4.4 V A) m TA = +85°C (µ ( E NT –2 AG T 3.8 RE L O TA = +25°C V CUR H AS G –3 3.2 BI HI UT UT P INP UT TA = –40°C –4 O 2.6 –5 2.0
06 09
–7.5 –5.0 –2.5 0 2.5 5.0
0 0 3-
0 3 6 9 12 15
3-
INPUT COMMON-MODE VOLTAGE (V)
10 10 01
SOURCE CURRENT (mA)
01 Figure 6. Input Bias Current vs. Input Common-Mode Voltage Figure 9. Output High Voltage, VOH vs. Source Current Rev. B | Page 6 of 12 Document Outline FEATURES APPLICATIONS PIN CONFIGURATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION OPTIMIZING HIGH SPEED PERFORMANCE OUTPUT LOADING CONSIDERATIONS INPUT STAGE AND BIAS CURRENTS USING HYSTERESIS OUTLINE DIMENSIONS ORDERING GUIDE
V+ANA = V+DIG = 5 V, V–ANA = 0 V, TA = 25°C, unless otherwise noted.
1.0 500 0.8 400 (mV) RS E IE G A IF T 0.6 L 300 L P VO AM F ET S F 0.4 R O 200 F E O B T M PU NU IN 0.2 100 0 0
04 07
–75 –50 –25 0 25 50 75 100 125 150
0
–5 –4 –3 –2 –1 0 1 2 3 4 5
0 3- 3-
TEMPERATURE (°C)
10 1 10 0
INPUT OFFSET VOLTAGE (mV)
01 Figure 4. Input Offset Voltage vs. Temperature Figure 7. Input Offset Voltage Distribution
0 10 STEPSIZE = 100mV OVERDRIVE = 5mV –1 8 A) s) n (µ tPDHL Y ( NT A –2 L 6 E D tPDLH CURRE TION AS –3 A 4 BI G A UT P O INP PR –4 2 –5
5
0
8
–75 –50 –25 0 25 50 75 100 125 150
00 00 3-
–50 –25 0 25 50 75 100 125
3-
TEMPERATURE (°C)
10 1 10 0
TEMPERATURE (°C)
1 0 Figure 5. Input Bias Current vs. Temperature Figure 8. Propagation Delay, tPDHL/tPDLH vs. Temperature
0 5.0 V+ANA = V+DIG = +5V V–ANA = –5V –1 ) 4.4 V A) m TA = +85°C (µ ( E NT –2 AG T 3.8 RE L O TA = +25°C V CUR H AS G –3 3.2 BI HI UT UT P INP UT TA = –40°C –4 O 2.6 –5 2.0
06 09
–7.5 –5.0 –2.5 0 2.5 5.0
0 0 3-
0 3 6 9 12 15
3-
INPUT COMMON-MODE VOLTAGE (V)
10 10 01
SOURCE CURRENT (mA)
01 Figure 6. Input Bias Current vs. Input Common-Mode Voltage Figure 9. Output High Voltage, VOH vs. Source Current Rev. B | Page 6 of 12 Document Outline FEATURES APPLICATIONS PIN CONFIGURATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION OPTIMIZING HIGH SPEED PERFORMANCE OUTPUT LOADING CONSIDERATIONS INPUT STAGE AND BIAS CURRENTS USING HYSTERESIS OUTLINE DIMENSIONS ORDERING GUIDE