Datasheet ADP7157 (Analog Devices) - 4

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ADP7157 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit
UNDERVOLTAGE THRESHOLDS Input Voltage Rising UVLORISE 2.22 2.29 V Falling UVLOFALL 1.95 2.02 V Hysteresis UVLOHYS 200 mV VREG THRESHOLDS8 Rising VREGUVLORISE 1.94 V Falling VREGUVLOFALL 1.60 V Hysteresis VREGUVLOHYS 185 mV EN INPUT PRECISION 2.3 V ≤ VIN ≤ 5.5 V EN Input Logic High ENHIGH 1.13 1.22 1.31 V Logic Low ENLOW 1.05 1.13 1.22 V Logic Hysteresis ENHYS 90 mV LEAKAGE CURRENT REF_SENSE IREF_SENSE_LKG 10 nA EN IEN_LKG EN = VIN or ground 0.01 1 µA 1 VOUT_MAX is the maximum output voltage of each version of the ADP7157. 2 Guaranteed by characterization, but not production tested. 3 This output voltage specification is for ADP7157-04 version. Table 10 provides a guide for selecting one of the four versions of the ADP7157 based on voltage range. 4 This specification is based on an endpoint calculation using 10 mA and 1.2 A loads. 5 Current-limit threshold is the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V output voltage is the current that causes the output voltage to drop to 90% of 3.0 V or 2.7 V. 6 Dropout voltage is the input to output voltage differential when the input voltage is set to the nominal output voltage. Dropout applies only for output voltages above 2.3 V. 7 Start-up time is the time from the rising edge of VEN to VOUT, VREG, or VREF being at 90% of its nominal value. 8 The output voltage is disabled until the VREG UVLO rise threshold is crossed. The VREG output is disabled until the input voltage UVLO rising threshold is crossed.
Table 3. Input and Output Capacitors, Recommended Specifications Parameter Symbol Test Conditions/Comments Min Typ Max Unit
MINIMUM CAPACITANCE TA = −40°C to +125°C Input1 CIN 7.0 10.0 µF Regulator1 CREG 0.7 1.0 µF Output1 COUT 7.0 10.0 µF Bypass CBYP 0.1 1.0 µF Reference CREF 0.7 1.0 µF CAPACITOR EFFECTIVE SERIES RESISTANCE (ESR) RESR TA = −40°C to +125°C COUT, CIN 0.1 Ω CREG, CREF 0.2 Ω CBYP 2.0 Ω 1 The minimum input, regulator, and output capacitances must be greater than 7.0 μF over the ful range of operating conditions. The full range of operating conditions in the application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended, and Y5V and Z5U capacitors are not recommended for use with any LDO. Rev. B | Page 4 of 23 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUIT REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL CAPACITOR SELECTION Output Capacitor Input and VREG Capacitor REF Capacitor BYP Capacitor Capacitor Properties UNDERVOLTAGE LOCKOUT (UVLO) PROGRAMMABLE PRECISION ENABLE START-UP TIME REF, BYP, AND VREG PINS CURRENT-LIMIT AND THERMAL SHUTDOWN THERMAL CONSIDERATIONS Thermal Characterization Parameter (ΨJB) PSRR PERFORMANCE PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE