Datasheet ADP7118 (Analog Devices) - 6

制造商Analog Devices
描述20 V, 200 mA, Low Noise, CMOS LDO Linear Regulator
页数 / 页24 / 6 — ADP7118. Data Sheet. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. VOUT …
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ADP7118. Data Sheet. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. VOUT 1. 6 VIN. SENSE/ADJ 2. TOP VIEW. 5 SS. (Not to Scale). GND 3

ADP7118 Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS VOUT 1 6 VIN SENSE/ADJ 2 TOP VIEW 5 SS (Not to Scale) GND 3

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ADP7118 Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS VOUT 1 6 VIN ADP7118 SENSE/ADJ 2 TOP VIEW 5 SS (Not to Scale) GND 3 EXPOSED PAD 4 EN NOTES 1. THE EXPOSED PAD ON THE BOTTOM OF THE PACKAGE ENHANCES THERMAL PERFORMANCE AND IS ELECTRICALLY CONNECTED TO GND INSIDE THE
003
PACKAGE. IT IS RECOMMENDED THAT THE EXPOSED
49-
PAD CONNECT TO THE GROUND PLANE ON THE BOARD.
118 Figure 3. 6-Lead LFCSP Pin Configuration
VIN 1 5 VOUT ADP7118 GND 2 TOP VIEW (Not to Scale) EN 3 4 SENSE/ADJ
-104 11849 Figure 4. 5-Lead TSOT Pin Configuration
VOUT 1 8 VIN VOUT 2 ADP7118 7 VIN TOP VIEW SENSE/ADJ 3 (Not to Scale) 6 SS GND 4 5 EN NOTES 1. THE EXPOSED PAD ON THE BOTTOM OF THE PACKAGE ENHANCES THERMAL PERFORMANCE AND IS ELECTRICALLY CONNECTED TO GND INSIDE THE
105
PACKAGE. IT IS RECOMMENDED THAT THE EXPOSED PAD CONNECT TO THE GROUND PLANE ON THE BOARD.
11849- Figure 5. 8-Lead SOIC Pin Configuration
Table 5. Pin Function Descriptions Pin No. 6-Lead LFCSP 8-Lead SOIC 5-Lead TSOT Mnemonic Description
1 1, 2 5 VOUT Regulated Output Voltage. Bypass VOUT to GND with a 2.2 μF or greater capacitor. 2 3 4 SENSE/ADJ Sense Input (SENSE). Connect to load. An external resistor divider may also set the output voltage higher than the fixed output voltage (ADJ). 3 4 2 GND Ground. 4 5 3 EN The enable pin controls the operation of the LDO. Drive EN high to turn on the regulator. Drive EN low to turn off the regulator. For automatic startup, connect EN to VIN. 5 6 Not applicable SS Soft Start. An external capacitor connected to this pin determines the soft-start time. Leave this pin open for a typical 380 μs start-up time. Do not ground this pin. 6 7, 8 1 VIN Regulator Input Supply. Bypass VIN to GND with a 2.2 μF or greater capacitor. Not applicable EP Exposed Pad. The exposed pad on the bottom of the package enhances thermal performance and is electrically connected to GND inside the package. It is recommended that the exposed pad connect to the ground plane on the board. Rev. E | Page 6 of 24 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITANCE, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties PROGRAMABLE PRECISION ENABLE SOFT START NOISE REDUCTION OF THE ADP7118 IN ADJUSTABLE MODE EFFECT OF NOISE REDUCTION ON START-UP TIME CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS