Datasheet ADM7151 (Analog Devices)
| 制造商 | Analog Devices |
| 描述 | 800 mA Ultralow Noise, High PSRR, RF Linear Regulator |
| 页数 / 页 | 24 / 1 — 800 mA Ultralow Noise,. High PSRR, RF Linear Regulator. Data Sheet. … |
| 修订版 | B |
| 文件格式/大小 | PDF / 1.2 Mb |
| 文件语言 | 英语 |
800 mA Ultralow Noise,. High PSRR, RF Linear Regulator. Data Sheet. ADM7151. FEATURES. TYPICAL APPLICATION CIRCUIT
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800 mA Ultralow Noise, High PSRR, RF Linear Regulator Data Sheet ADM7151 FEATURES TYPICAL APPLICATION CIRCUIT Input voltage range: 4.5 V to 16 V ADM7151-04 V Maximum output current: 800 mA IN = 6.2V VOUT = 5.0V VIN VOUT C C Adjustable output from 1.5 V to 5.1 V IN OUT 10µF 10µF Low noise ON EN REF 1.0 μV rms total integrated noise from 100 Hz to 100 kHz C OFF V REF BYP BYP 1µF 1.6 μV rms total integrated noise from 10 Hz to 100 kHz CBYP 1µF R1 Noise spectral density: 1.7 nV√Hz from 10 kHz to 1 MHz REF_SENSE VOUT = 1.5V × (R1 + R2)/R2 Power supply rejection ratio (PSRR) at 400 mA load R2 VREG >90 dB from 1 kHz to 100 kHz, V VREG 1kΩ < R2 < 200kΩ OUT = 5 V C GND REG
001
>60 dB at 1 MHz, V 10µF OUT = 5 V
11480-
Dropout voltage: 0.6 V at VOUT = 5 V, 800 mA load
Figure 1. ADM7151-04 with VOUT = 5 V
Initial voltage accuracy: ±1% Voltage accuracy over line, load and temperature: ±2% Quiescent current (IGND): 4.3 mA at no load Low shutdown current: 0.1 μA Stable with a 10 μF ceramic output capacitor 8-lead LFCSP package and 8-lead SOIC package APPLICATIONS Regulated power noise sensitive applications RF mixers, phase-locked loops (PLLs), voltage-controlled oscillators (VCOs), and PLLs with integrated VCOs Clock distribution circuits Ultrasound and other imaging applications High speed RF transceivers High speed, 16-bit or greater ADCs Communications and infrastructure Cable digital-to-analog converter (DAC) drivers GENERAL DESCRIPTION
but also providing excellent thermal performance for applications The ADM7151 is a low dropout (LDO) linear regulator that requiring up to 800 mA of output current in a small, low profile operates from 4.5 V to 16 V and provides up to 800 mA of output footprint. current. Using an advanced proprietary architecture, it provides
100k CBYP = 1µF
high power supply rejection (>90 dB from 1 kHz to 1 MHz),
CBYP = 10µF ) CBYP = 100µF
ultralow noise (1.7 nV√Hz from 10 kHz to 1 MHz), and excellent
√Hz 10k CBYP = 1mF V/
line and load transient response with a 10 μF ceramic output
(n Y
capacitor. The output voltage can be set to any voltage between
T SI 1k
1.5 V and 5.1 V with two resistors.
EN D L
The ADM7151 is available in two models that optimize power
A R T 100
dissipation and PSRR performance as a function of input and output voltage. See Table 6 and Table 7 for selection guides.
SPEC ISE 10
The ADM7151 regulator output noise is 1.0 μV rms from
O N
100 Hz to 100 kHz, and the noise spectral density is 1.7 nV/√Hz from 10 kHz to 1 MHz.
1 0.1 1 10 100 1k 10k 100k 1M
002 0- The ADM7151 is available in 8-lead, 3 mm × 3 mm LFCSP and
FREQUENCY (Hz)
1148 8-lead SOIC packages, making it not only a very compact solution, Figure 2. Noise Spectral Density (NSD) vs. Frequency for Various CBYP
Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2013–2019 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION MODEL SELECTION CAPACITOR SELECTION Output Capacitor Input and VREG Capacitor REF Capacitor BYP Capacitor Capacitor Properties ENABLE (EN) AND UNDERVOLTAGE LOCKOUT (UVLO) START-UP TIME REF, BYP, AND VREG PINS CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS Thermal Characterization Parameter (ΨJB) PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
800 mA Ultralow Noise, High PSRR, RF Linear Regulator Data Sheet ADM7151 FEATURES TYPICAL APPLICATION CIRCUIT Input voltage range: 4.5 V to 16 V ADM7151-04 V Maximum output current: 800 mA IN = 6.2V VOUT = 5.0V VIN VOUT C C Adjustable output from 1.5 V to 5.1 V IN OUT 10µF 10µF Low noise ON EN REF 1.0 μV rms total integrated noise from 100 Hz to 100 kHz C OFF V REF BYP BYP 1µF 1.6 μV rms total integrated noise from 10 Hz to 100 kHz CBYP 1µF R1 Noise spectral density: 1.7 nV√Hz from 10 kHz to 1 MHz REF_SENSE VOUT = 1.5V × (R1 + R2)/R2 Power supply rejection ratio (PSRR) at 400 mA load R2 VREG >90 dB from 1 kHz to 100 kHz, V VREG 1kΩ < R2 < 200kΩ OUT = 5 V C GND REG
001
>60 dB at 1 MHz, V 10µF OUT = 5 V
11480-
Dropout voltage: 0.6 V at VOUT = 5 V, 800 mA load
Figure 1. ADM7151-04 with VOUT = 5 V
Initial voltage accuracy: ±1% Voltage accuracy over line, load and temperature: ±2% Quiescent current (IGND): 4.3 mA at no load Low shutdown current: 0.1 μA Stable with a 10 μF ceramic output capacitor 8-lead LFCSP package and 8-lead SOIC package APPLICATIONS Regulated power noise sensitive applications RF mixers, phase-locked loops (PLLs), voltage-controlled oscillators (VCOs), and PLLs with integrated VCOs Clock distribution circuits Ultrasound and other imaging applications High speed RF transceivers High speed, 16-bit or greater ADCs Communications and infrastructure Cable digital-to-analog converter (DAC) drivers GENERAL DESCRIPTION
but also providing excellent thermal performance for applications The ADM7151 is a low dropout (LDO) linear regulator that requiring up to 800 mA of output current in a small, low profile operates from 4.5 V to 16 V and provides up to 800 mA of output footprint. current. Using an advanced proprietary architecture, it provides
100k CBYP = 1µF
high power supply rejection (>90 dB from 1 kHz to 1 MHz),
CBYP = 10µF ) CBYP = 100µF
ultralow noise (1.7 nV√Hz from 10 kHz to 1 MHz), and excellent
√Hz 10k CBYP = 1mF V/
line and load transient response with a 10 μF ceramic output
(n Y
capacitor. The output voltage can be set to any voltage between
T SI 1k
1.5 V and 5.1 V with two resistors.
EN D L
The ADM7151 is available in two models that optimize power
A R T 100
dissipation and PSRR performance as a function of input and output voltage. See Table 6 and Table 7 for selection guides.
SPEC ISE 10
The ADM7151 regulator output noise is 1.0 μV rms from
O N
100 Hz to 100 kHz, and the noise spectral density is 1.7 nV/√Hz from 10 kHz to 1 MHz.
1 0.1 1 10 100 1k 10k 100k 1M
002 0- The ADM7151 is available in 8-lead, 3 mm × 3 mm LFCSP and
FREQUENCY (Hz)
1148 8-lead SOIC packages, making it not only a very compact solution, Figure 2. Noise Spectral Density (NSD) vs. Frequency for Various CBYP
Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2013–2019 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION MODEL SELECTION CAPACITOR SELECTION Output Capacitor Input and VREG Capacitor REF Capacitor BYP Capacitor Capacitor Properties ENABLE (EN) AND UNDERVOLTAGE LOCKOUT (UVLO) START-UP TIME REF, BYP, AND VREG PINS CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS Thermal Characterization Parameter (ΨJB) PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE