Datasheet ADM7150 (Analog Devices) - 3

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Data Sheet ADM7150 SPECIFICATIONS
VIN = VOUT + 1.2 V or VIN = 4.5 V, whichever is greater, VEN = VIN, IOUT = 10 mA, CIN = COUT = CREG = 10 µF, CREF = CBYP = 1 µF. TA = 25°C for typical specifications. TJ = −40°C to +125°C for minimum/maximum specifications, unless otherwise noted.
Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT VOLTAGE RANGE VIN 4.5 16 V OPERATING SUPPLY CURRENT IGND IOUT = 0 µA 4.3 7.0 mA IOUT = 800 mA 8.6 12 mA SHUTDOWN CURRENT IIN-SD VEN = 0 V 0.1 3 µA OUTPUT NOISE OUTNOISE 10 Hz to 100 kHz, independent of output voltage 1.6 µV rms 100 Hz to 100 kHz, independent of output voltage 1.0 µV rms NOISE SPECTRAL DENSITY NSD 10 kHz to 1 MHz, independent of output voltage 1.7 nV/√Hz POWER SUPPLY REJECTION RATIO PSRR 1 kHz to 100 kHz, VIN = 6.2 V, VOUT = 5 V at 800 mA 86 dB 1 MHz, VIN = 6.2 V, VOUT = 5 V at 800 mA 54 dB 1 kHz to 100 kHz, VIN = 6.2 V, VOUT = 5 V at 400 mA 95 dB 1 MHz, VIN = 6.2 V, VOUT = 5 V at 400 mA 62 dB 1 kHz to 100 kHz, VIN = 5 V, VOUT = 3.3 V at 800 mA 94 dB 1 MHz, VIN = 5 V, VOUT = 3.3 V at 800 mA 62 dB 1 kHz to 100 kHz, VIN = 5 V, VOUT = 3.3 V at 400 mA 95 dB 1 MHz, VIN = 5 V, VOUT = 3.3 V at 400 mA 68 dB VOUT VOLTAGE ACCURACY VOUT = VREF Voltage Accuracy VOUT IOUT = 10 mA, TJ = 25°C −1 +1 % 1 mA < IOUT < 800 mA, over line, load and −2 +2 % temperature VOUT REGULATION Line Regulation ΔVOUT/ΔVIN VIN = VOUT + 1.2 V or VOUT + 4.5 V, whichever is −0.01 +0.01 %/V greater, to 16 V Load Regulation1 ΔVOUT/ΔIOUT IOUT = 1 mA to 800 mA 0.4 1.0 %/A VOUT CURRENT-LIMIT THRESHOLD2 ILIMIT 1.0 1.2 1.6 A DROPOUT VOLTAGE3 VDROPOUT IOUT = 400 mA, VOUT = 5 V 0.3 0.5 V IOUT = 800 mA, VOUT = 5 V 0.6 1.0 V PULL-DOWN RESISTANCE VOUT Pull-Down Resistance VOUT-PULL VEN = 0 V, VOUT = 1 V 600 Ω VREG Pull-Down Resistance VREG-PULL VEN = 0 V, VREG = 1 V 34 kΩ VREF Pull-Down Resistance VREF-PULL VEN = 0 V, VREF = 1 V 800 Ω VBYP Pull-Down Resistance VBYP-PULL VEN = 0 V, VBYP = 1 V 500 Ω START-UP TIME4 VOUT = 5 V VOUT Start-Up Time tSTART-UP 2.8 ms VREG Start-Up Time tREG-START-UP 1.0 ms VREF Start-Up Time tREF-START-UP 1.8 ms THERMAL SHUTDOWN Thermal Shutdown Threshold TSSD TJ rising 155 °C Thermal Shutdown Hysteresis TSSD-HYS 15 °C UNDERVOLTAGE THRESHOLDs Input Voltage Rising UVLORISE 4.49 V Input Voltage Falling UVLOFALL 3.85 V Hysteresis UVLOHYS 240 mV V 5 REG UNDERVOLTAGE THRESHOLDS VREG Rise VREGUVLORISE 3.1 V VREG Fall VREGUVLOFALL 2.55 V Hysteresis VREGUVLOHYS 210 mV Rev. 0 | Page 3 of 24 Document Outline Features Applications General Description Typical Application Circuit Table of Contents Revision History Specifications Input and Output Capacitor Recommended Specifications Absolute Maximum Ratings Thermal Data Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Applications Information Capacitor Selection Output Capacitor Input and VREG Capacitor REF Capacitor BYP Capacitor Capacitor Properties Enable (EN) and Undervoltage Lockout (UVLO) Start-Up Time REF, BYP, and, VREG pins Current-Limit and Thermal Overload Protection Thermal Considerations Thermal Characterization Parameter (ΨJB) Printed Circuit Board Layout Considerations Outline Dimensions Ordering Guide