数据表Datasheet ADP7104 (Analog Devices)
Datasheet ADP7104 (Analog Devices)
制造商 | Analog Devices |
描述 | 20 V, 500 mA, Low Noise, CMOS LDO |
页数 / 页 | 25 / 1 — 20 V, 500 mA, Low Noise, CMOS LDO. Data Sheet. ADP7104. FEATURES. TYPICAL … |
修订版 | I |
文件格式/大小 | PDF / 1.3 Mb |
文件语言 | 英语 |
20 V, 500 mA, Low Noise, CMOS LDO. Data Sheet. ADP7104. FEATURES. TYPICAL APPLICATION CIRCUITS
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20 V, 500 mA, Low Noise, CMOS LDO Data Sheet ADP7104 FEATURES TYPICAL APPLICATION CIRCUITS Input voltage range: 3.3 V to 20 V V VIN VOUT V IN = 8V OUT = 5V Maximum output current: 500 mA CIN + + COUT 1µF 1µF Low noise: 15 μV rms for fixed output versions SENSE RPG PSRR performance of 60 dB at 10 kHz, V R1 OUT = 3.3 V ON 100kΩ 100kΩ OFF EN/ Reverse current protection UVLO R2 PG PG Low dropout voltage: 350 mV at 500 mA 100kΩ GND Initial accuracy: ±0.8%
1 0 0 7-
Accuracy over line, load, and temperature
50 09
−2% to +1%, TJ = −40°C to +125°C
Figure 1. ADP7104 with Fixed Output Voltage, 5 V
−1.25% to +1%, TJ = 0°C to +85°C V VIN VOUT V Low quiescent current (V IN = 8V OUT = 5V IN = 5 V), IGND = 900 μA with 500 mA load CIN + + COUT 40.2kΩ Low shutdown current: <40 μA at V 1µF 1µF IN = 12 V, stable with small ADJ 1 μF ceramic output capacitor 13kΩ ON R1 100kΩ 7 fixed output voltage options: 1.5 V, 1.8 V, 2.5 V, 3 V, 3.3 V, RPG OFF EN/ UVLO 100kΩ 5 V, and 9 V R2 PG PG 100kΩ Adjustable output from 1.22 V to VIN − VDO GND Foldback current limit and thermal overload protection
-002 507 09
User programmable precision UVLO/enable
Figure 2. ADP7104 with Adjustable Output Voltage, 5 V
Power-good indicator 8-lead LFCSP and 8-lead SOIC packages APPLICATIONS Regulation to noise sensitive applications: ADC, DAC circuits, precision amplifiers, high frequency oscillators, clocks, and PLLs Communications and infrastructure Medical and healthcare Industrial and instrumentation GENERAL DESCRIPTION
The ADP7104 is a CMOS, low dropout linear regulator that oper- The ADP7104 output noise voltage is 15 μV rms and is inde- ates from 3.3 V to 20 V and provides up to 500 mA of output pendent of the output voltage. A digital power-good output current. This high input voltage LDO is ideal for regulation of allows power system monitors to check the health of the output high performance analog and mixed signal circuits operating voltage. A user programmable precision undervoltage lockout from 19 V to 1.22 V rails. Using an advanced proprietary archi- function facilitates sequencing of multiple power supplies. tecture, it provides high power supply rejection, low noise, and The ADP7104 is available in 8-lead, 3 mm × 3 mm LFCSP achieves excellent line and load transient response with just a and 8-lead SOIC packages. The LFCSP offers a very compact small 1 μF ceramic output capacitor. solution and also provides excellent thermal performance for The ADP7104 is available in seven fixed output voltage options applications requiring up to 500 mA of output current in a and an adjustable version, which allows output voltages that range small, low-profile footprint. from 1.22 V to VIN − VDO via an external feedback divider.
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Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties PROGRAMMABLE UNDERVOLTAGE LOCKOUT (UVLO) POWER-GOOD FEATURE NOISE REDUCTION OF THE ADJUSTABLE ADP7104 CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE