数据表Datasheet ADP322, ADP323 (Analog …
Datasheet ADP322, ADP323 (Analog Devices)
制造商 | Analog Devices |
描述 | Triple, 200 mA, Low Noise, High PSRR Voltage Regulator |
页数 / 页 | 24 / 1 — Triple, 200 mA, Low Noise,. High PSRR Voltage Regulator. Data Sheet. … |
修订版 | E |
文件格式/大小 | PDF / 854 Kb |
文件语言 | 英语 |
Triple, 200 mA, Low Noise,. High PSRR Voltage Regulator. Data Sheet. ADP322/. ADP323. FEATURES. TYPICAL APPLICATION CIRCUITS
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Triple, 200 mA, Low Noise, High PSRR Voltage Regulator Data Sheet ADP322/ ADP323 FEATURES TYPICAL APPLICATION CIRCUITS Fixed (ADP322) and adjustable output (ADP323) options ADP322 VBIAS Bias voltage range (VBIAS): 2.5 V to 5.5 V VBIAS 2.5V TO 5.5V LDO input voltage range (VIN1/VIN2, VIN3): 1.8 V to 5.5 V + 1µF Three 200 mA low dropout voltage regulators (LDOs) VIN1/VIN2 1.8V TO 5.5V 16-lead, 3 mm × 3 mm LFCSP + LDO 1 VOUT1 1µF ON Initial accuracy: ±1% EN1 + OFF EN LD1 1µF Stable with 1 µF ceramic output capacitors VBIAS No noise bypass capacitor required LDO 2 VOUT2 ON 3 independent logic controlled enables EN2 + OFF EN LD2 1µF Overcurrent and thermal protection VBIAS VIN3 1.8V TO Key specifications 5.5V + LDO 3 VOUT3 1µF High PSRR ON EN3 + OFF EN LD3 1µF 76 dB PSRR up to 1 kHz
001
70 dB PSRR at 10 kHz GND
09288-
60 dB PSRR at 100 kHz
Figure 1. Typical Application Circuit for ADP322
40 dB PSRR at 1 MHz Low output noise VBIAS 24 µV rms typical output noise at V ADP323 OUT = 1.2 V VBIAS 2.5V TO 43 µV rms typical output noise at VOUT = 2.8 V 5.5V + 1µF Excellent transient response VIN1/VIN2 Low dropout voltage: 110 mV at 200 mA load 1.8V TO VOUT1 5.5V + LDO 1 85 µA typical ground current at no load, all LDOs enabled 1µF ON + FB1 1µF EN1 100 µs fast turn on circuit OFF EN LD1 Guaranteed 200 mA output current per regulator VBIAS −40°C to +125°C junction temperature VOUT2 LDO 2 ON + FB2 EN2 1µF APPLICATIONS OFF EN LD2 VBIAS Mobile phones VIN3 1.8V TO VOUT3 Digital cameras and audio devices 5.5V + LDO 3 1µF ON FB3 + Portable and battery-powered equipment EN3 1µF OFF EN LD3 Portable medical devices
053
Post dc-to-dc regulation GND
09288- Figure 2. Typical Application Circuit for ADP323
GENERAL DESCRIPTION
The ADP322/ADP323 200 mA triple output LDOs combine high The ADP322/ADP323 are available in a miniature 16-lead, 3 mm × PSRR, low noise, low quiescent current, and low dropout voltage 3 mm LFCSP package and are stable with tiny 1 µF ±30% ceramic to extend the battery life of portable devices and are ideally suited output capacitors providing the smallest possible board area for for wireless applications with demanding performance and board a wide variety of portable power needs. space requirements. The ADP322 is available in output voltage combinations ranging The ADP322/ADP323 PSRR is greater than 60 dB for frequencies from 0.8 V to 3.3 V and offers overcurrent and thermal protection as high as 100 kHz while operating with a low headroom voltage. to prevent damage in adverse conditions. The ADP323 adjustable The ADP322/ADP323 offer much lower noise performance than triple LDO can be configured for any output voltage between competing LDOs without the need for a noise bypass capacitor. 0.5 V and 5 V with two resistors for each output.
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Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties UNDERVOLTAGE LOCKOUT ENABLE FEATURE NOISE REDUCTION OF THE ADP323 IN ADJUSTABLE MODE CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE NOTES