Datasheet ADP1754, ADP1755 (Analog Devices) - 6

ADP1754/ADP1755 Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS UT UT UT UT N N O O N N O O VI VI V V VI VI V V 16 15 14 13 16 15 14 13 VIN 1 12 VOUT VIN 1 12 VOUT VIN 2 11 VOUT ADP1754 VIN 2 11 VOUT ADP1755 TOP VIEW TOP VIEW VIN 3 10 VOUT VIN 3 10 VOUT (Not to Scale) (Not to Scale) EN 4 9 SENSE EN 4 9 ADJ 5 6 7 8 5 6 7 8 PG ND SS NC PG ND SS NC G G NOTES 1. NC = NO CONNECT. NOTES 2. THE EXPOSED PAD ON THE BOTTOM OF THE LFCSP ENHANCES 1. NC = NO CONNECT. THERMAL PERFORMANCE AND IS ELECTRICALLY CONNECTED TO GND 2. THE EXPOSED PAD ON THE BOTTOM OF THE LFCSP ENHANCES
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INSIDE THE PACKAGE. IT IS RECOMMENDED THAT THE EXPOSED PAD THERMAL PERFORMANCE AND IS ELECTRICALLY CONNECTED TO GND
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BE CONNECTED TO THE GROUND PLANE ON THE BOARD. INSIDE THE PACKAGE. IT IS RECOMMENDED THAT THE EXPOSED PAD
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BE CONNECTED TO THE GROUND PLANE ON THE BOARD.
07722- Figure 3. ADP1754 Pin Configuration Figure 4. ADP1755 Pin Configuration
Table 5. Pin Function Descriptions ADP1754 ADP1755 Pin No. Pin No. Mnemonic Description
1, 2, 3, 15, 1, 2, 3, 15, VIN Regulator Input Supply. Bypass VIN to GND with a 4.7 µF or greater capacitor. Note that all five 16 16 VIN pins must be connected to the source. 4 4 EN Enable Input. Drive EN high to turn on the regulator; drive it low to turn off the regulator. For automatic startup, connect EN to VIN. 5 5 PG Power Good. This open-drain output requires an external pull-up resistor to VIN. If the part is in shutdown mode, current-limit mode, thermal shutdown, or if it falls below 90% of the nominal output voltage, PG immediately transitions low. 6 6 GND Ground. 7 7 SS Soft Start. A capacitor connected to this pin determines the soft start time. 8 8 NC Not Connected. No internal connection. 9 N/A SENSE Sense. This pin measures the actual output voltage at the load and feeds it to the error amplifier. Connect SENSE as close as possible to the load to minimize the effect of IR drop between the regulator output and the load. N/A 9 ADJ Adjust. A resistor divider from VOUT to ADJ sets the output voltage. 10, 11, 12, 10, 11, 12, VOUT Regulated Output Voltage. Bypass VOUT to GND with a 4.7 µF or greater capacitor. Note that all 13, 14 13, 14 five VOUT pins must be connected to the load. 17 (EPAD) 17 (EPAD) Exposed The exposed pad on the bottom of the LFCSP package enhances thermal performance and is paddle electrically connected to GND inside the package. It is recommended that the exposed pad be (EPAD) connected to the ground plane on the board. Rev. G | Page 6 of 20 Document Outline Features Applications Typical Application Circuits General Description Table of Contents Revision History Specifications Input and Output Capacitor, Recommended Specifications Absolute Maximum Ratings Thermal Data Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Soft Start Function (ADP1754/ADP1755) Adjustable Output Voltage (ADP1755) Enable Feature Power-Good Feature Reverse Current Protection Feature Applications Information Capacitor Selection Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties Undervoltage Lockout Current-Limit and Thermal Overload Protection Thermal Considerations PCB Layout Considerations Outline Dimensions Ordering Guide