Datasheet PE43610 (pSemi) - 9
| 制造商 | pSemi |
| 描述 | UltraCMOS RF Digital Step Attenuator, 9 kHz–13 GHz |
| 页数 / 页 | 21 / 9 — PE43610. UltraCMOS® RF Digital Step Attenuator. Table 8 • Serial … |
| 文件格式/大小 | PDF / 1.1 Mb |
| 文件语言 | 英语 |
PE43610. UltraCMOS® RF Digital Step Attenuator. Table 8 • Serial Interface AC Characteristics. (1). Parameter/Condition. Min. Max
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PE43610 UltraCMOS® RF Digital Step Attenuator Table 8 • Serial Interface AC Characteristics (1) Parameter/Condition Min Max Unit
Serial clock frequency, FCLK 10 MHz Serial clock time period, TCLK 100 ns Serial clock HIGH time, TCLKH 30 ns Serial clock LOW time, TCLKL 30 ns Last serial clock rising edge setup time to latch enable rising edge, TLESU 10 ns Latch enable minimum pulse width, TLEPW 30 ns Serial data setup time, TSISU 10 ns Serial data hold time, TSIH 10 ns Serial interface data output (SDO) propagation delay, TSDOPD 30
(2)
ns 1) VDD = 3.3V or 5.5V, –40 °C, < TA < +105 °C, unless otherwise specified. 2) Measured with 10 pF SDO load capacitance.
Table 9 • Latch and Clock Specifications Latch Enable (LE) Clock (CLK) Function
0 ↑ Shift register clocked ↑ Contents of shift register X transferred to attenuator (rising edge) core DOC-93588-3 – (06/2020) Page 9 of 21 www.psemi.com Document Outline Features Applications Product Description Optional External VSS Control Absolute Maximum Ratings ESD Precautions Latch-up Immunity Recommended Operating Conditions Electrical Specifications Switching Frequency Spur-free Performance Glitch-safe Attenuation State The PE43610 features a novel architecture to provide safe transition behavior when changing attenuation states. When RF input power is applied, positive output power spikes are prevented during attenuation state changes by optimized internal timing c... Truth Tables Serial Addressable Register Map Programming Options Parallel/Serial Selection Parallel Mode Interface For direct parallel programming, the LE line should be pulled HIGH. Changing attenuation state control values changes the device state to new attenuation. Direct mode is ideal for manual control of the device (using hardwire, switches, or jumpers). Serial-Addressable Interface Power-up Control Settings Typical Performance Data Pin Configuration Packaging Information Moisture Sensitivity Level Package Drawing Top-Marking Specification Tape and Reel Specification Ordering Information
PE43610 UltraCMOS® RF Digital Step Attenuator Table 8 • Serial Interface AC Characteristics (1) Parameter/Condition Min Max Unit
Serial clock frequency, FCLK 10 MHz Serial clock time period, TCLK 100 ns Serial clock HIGH time, TCLKH 30 ns Serial clock LOW time, TCLKL 30 ns Last serial clock rising edge setup time to latch enable rising edge, TLESU 10 ns Latch enable minimum pulse width, TLEPW 30 ns Serial data setup time, TSISU 10 ns Serial data hold time, TSIH 10 ns Serial interface data output (SDO) propagation delay, TSDOPD 30
(2)
ns 1) VDD = 3.3V or 5.5V, –40 °C, < TA < +105 °C, unless otherwise specified. 2) Measured with 10 pF SDO load capacitance.
Table 9 • Latch and Clock Specifications Latch Enable (LE) Clock (CLK) Function
0 ↑ Shift register clocked ↑ Contents of shift register X transferred to attenuator (rising edge) core DOC-93588-3 – (06/2020) Page 9 of 21 www.psemi.com Document Outline Features Applications Product Description Optional External VSS Control Absolute Maximum Ratings ESD Precautions Latch-up Immunity Recommended Operating Conditions Electrical Specifications Switching Frequency Spur-free Performance Glitch-safe Attenuation State The PE43610 features a novel architecture to provide safe transition behavior when changing attenuation states. When RF input power is applied, positive output power spikes are prevented during attenuation state changes by optimized internal timing c... Truth Tables Serial Addressable Register Map Programming Options Parallel/Serial Selection Parallel Mode Interface For direct parallel programming, the LE line should be pulled HIGH. Changing attenuation state control values changes the device state to new attenuation. Direct mode is ideal for manual control of the device (using hardwire, switches, or jumpers). Serial-Addressable Interface Power-up Control Settings Typical Performance Data Pin Configuration Packaging Information Moisture Sensitivity Level Package Drawing Top-Marking Specification Tape and Reel Specification Ordering Information