Datasheet DA9131-A (Dialog Semiconductor) - 3
| 制造商 | Dialog Semiconductor |
| 描述 | High-Performance, Dual-Channel DC-DC Converter |
| 页数 / 页 | 53 / 3 — DA9131-A. High-Performance, Dual-Channel DC-DC Converter. System … |
| 文件格式/大小 | PDF / 1.2 Mb |
| 文件语言 | 英语 |
DA9131-A. High-Performance, Dual-Channel DC-DC Converter. System Diagrams. Figure 1: Simplified Schematic Diagram
该数据表的模型线
文件文字版本
DA9131-A High-Performance, Dual-Channel DC-DC Converter System Diagrams
VDD = 2.5 V to 5.5 V 1 µF 2x 10 µF PVDD1 FB1P 100 nH Buck1 2x 10 µF VOUT1 = 0. 3 V to 1.9 V PG ND Digital Core FB1N OTP Memory IC_EN Register Map
DA9131-A
CONF/GPIO0 FB2P GPIO1 100 nH Bias Supervision GPIO2 SCL/GPIO3 Oscillator Buck2 2x 10 µF V SDA/GPIO4 PG ND OUT2 = 0. 3 V to 1.9 V I2C AG ND FB2N GPIO
Figure 1: Simplified Schematic Diagram
DDR 1.1 V 1.8 V 0. 0 N P 2 1 P N 5 N P 2 1 P N . ON 2 2 X X 1 1 V ON 2 2 X X 1 1 5 B B L L B B B B L L B B V F F F F F F F F CPU GPU IC_EN PVDD IC_EN PVDD 8.1 DA9131-A V AVDD DA9131-A AVDD SoC CONF AGND CONF AGND GPIO 2 2 1 2 2 1 N P P N P P E L L PG E L L PG PG (DVS ready) CPU_LP GPU_LP GPU_EN IO_LP DDR_LP
Figure 2: Typical Application Diagram (Port Control)
DDR 1.1 V 1.8 V 0. 0 N P 2 1 P N 5 N P 2 1 P N . ON 2 2 X X 1 1 V ON 2 2 X X 1 1 5 B B L L B B B B L L B B V F F F F F F F F CPU GPU IC_EN PVDD IC_EN PVDD 8.1 DA9131-A AVDD DA9131-A V AVDD SoC CONF AGND CONF AGND Q Q I2C GPIO A L A L RI D C RI D C n PG S S n PG S S I2C CLK I2C DATA Faults PG (ENx/DVS ready)
Figure 3: Typical Application Diagram (I2C Control) Datasheet Revision 1.0 31-Aug-2020
CFR0011-120-00 3 of 53 © 2020 Dialog Semiconductor Document Outline General Description Key Features Benefits Applications System Diagrams Contents Table of Figures Table of Tables 1 Terms and Definitions 2 Pinout 3 Characteristics 3.1 Absolute Maximum Ratings 3.2 Recommended Operating Conditions 3.3 Thermal Characteristics 3.3.1 Thermal Ratings 3.3.2 Power Dissipation 3.4 ESD Characteristics 3.5 Buck Characteristics 3.6 Performance and Supervision Characteristics 3.7 Digital I/O Characteristics 3.8 Timing Characteristics 3.9 Typical Performance 4 Functional Description 4.1 DC-DC Buck Converter 4.1.1 Switching Frequency 4.1.2 Operation Modes and Phase Selection 4.1.3 Output Voltage Selection 4.1.4 Soft Start-Up and Shutdown 4.1.5 Current Limit 4.1.6 Resistive Divider 4.1.7 Thermal Protection 4.2 Internal Circuits 4.2.1 IC_EN/Chip Enable/Disable 4.2.2 nIRQ/Interrupt 4.2.3 GPIO 4.2.3.1 GPIO Pin Assignment 4.2.3.2 GPIO Function 4.2.3.3 Chip Configuration Select (CONF) 4.3 Operating Modes 4.3.1 ON 4.3.2 OFF 4.4 I2C Communication 4.4.1 I2C Protocol 5 Register Definitions 5.1 Register Map 5.1.1 System 5.1.2 Buck1 5.1.3 Buck2 5.1.4 Serialization 6 Package Information 6.1 Package Outlines 6.2 Moisture Sensitivity Level 6.3 Soldering Information 7 Ordering Information 8 Application Information 8.1 Capacitor Selection 8.2 Inductor Selection
VDD = 2.5 V to 5.5 V 1 µF 2x 10 µF PVDD1 FB1P 100 nH Buck1 2x 10 µF VOUT1 = 0. 3 V to 1.9 V PG ND Digital Core FB1N OTP Memory IC_EN Register Map
DA9131-A
CONF/GPIO0 FB2P GPIO1 100 nH Bias Supervision GPIO2 SCL/GPIO3 Oscillator Buck2 2x 10 µF V SDA/GPIO4 PG ND OUT2 = 0. 3 V to 1.9 V I2C AG ND FB2N GPIO
Figure 1: Simplified Schematic Diagram
DDR 1.1 V 1.8 V 0. 0 N P 2 1 P N 5 N P 2 1 P N . ON 2 2 X X 1 1 V ON 2 2 X X 1 1 5 B B L L B B B B L L B B V F F F F F F F F CPU GPU IC_EN PVDD IC_EN PVDD 8.1 DA9131-A V AVDD DA9131-A AVDD SoC CONF AGND CONF AGND GPIO 2 2 1 2 2 1 N P P N P P E L L PG E L L PG PG (DVS ready) CPU_LP GPU_LP GPU_EN IO_LP DDR_LP
Figure 2: Typical Application Diagram (Port Control)
DDR 1.1 V 1.8 V 0. 0 N P 2 1 P N 5 N P 2 1 P N . ON 2 2 X X 1 1 V ON 2 2 X X 1 1 5 B B L L B B B B L L B B V F F F F F F F F CPU GPU IC_EN PVDD IC_EN PVDD 8.1 DA9131-A AVDD DA9131-A V AVDD SoC CONF AGND CONF AGND Q Q I2C GPIO A L A L RI D C RI D C n PG S S n PG S S I2C CLK I2C DATA Faults PG (ENx/DVS ready)
Figure 3: Typical Application Diagram (I2C Control) Datasheet Revision 1.0 31-Aug-2020
CFR0011-120-00 3 of 53 © 2020 Dialog Semiconductor Document Outline General Description Key Features Benefits Applications System Diagrams Contents Table of Figures Table of Tables 1 Terms and Definitions 2 Pinout 3 Characteristics 3.1 Absolute Maximum Ratings 3.2 Recommended Operating Conditions 3.3 Thermal Characteristics 3.3.1 Thermal Ratings 3.3.2 Power Dissipation 3.4 ESD Characteristics 3.5 Buck Characteristics 3.6 Performance and Supervision Characteristics 3.7 Digital I/O Characteristics 3.8 Timing Characteristics 3.9 Typical Performance 4 Functional Description 4.1 DC-DC Buck Converter 4.1.1 Switching Frequency 4.1.2 Operation Modes and Phase Selection 4.1.3 Output Voltage Selection 4.1.4 Soft Start-Up and Shutdown 4.1.5 Current Limit 4.1.6 Resistive Divider 4.1.7 Thermal Protection 4.2 Internal Circuits 4.2.1 IC_EN/Chip Enable/Disable 4.2.2 nIRQ/Interrupt 4.2.3 GPIO 4.2.3.1 GPIO Pin Assignment 4.2.3.2 GPIO Function 4.2.3.3 Chip Configuration Select (CONF) 4.3 Operating Modes 4.3.1 ON 4.3.2 OFF 4.4 I2C Communication 4.4.1 I2C Protocol 5 Register Definitions 5.1 Register Map 5.1.1 System 5.1.2 Buck1 5.1.3 Buck2 5.1.4 Serialization 6 Package Information 6.1 Package Outlines 6.2 Moisture Sensitivity Level 6.3 Soldering Information 7 Ordering Information 8 Application Information 8.1 Capacitor Selection 8.2 Inductor Selection