Datasheet AD8224 (Analog Devices) - 9

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Data Sheet AD8224 ABSOLUTE MAXIMUM RATINGS Table 8. Maximum Power Dissipation Parameter Rating
The maximum safe power dissipation for the AD8224 is limited Supply Voltage ±18 V by the associated rise in junction temperature (TJ) on the die. At Power Dissipation See Figure 2 approximately 130°C, which is the glass transition temperature, Output Short-Circuit Current Indefinite1 the plastic changes its properties. Even temporarily exceeding Input Voltage (Common Mode) ±V this temperature limit may change the stresses that the package S Differential Input Voltage ±V exerts on the die, permanently shifting the parametric performance S Storage Temperature Range −65°C to +130°C of the amplifiers. Exceeding a temperature of 130°C for an Operating Temperature Range2 −40°C to +125°C extended period can result in a loss of functionality. Figure 2 Lead Temperature (Soldering, 10 sec) 300°C shows the maximum safe power dissipation in the package vs. Junction Temperature 130°C the ambient temperature for the LFCSP on a 4-layer JEDEC Package Glass Transition Temperature 130°C standard board. ESD (Human Body Model) 4 kV
4.0
ESD (Charge Device Model) 1 kV
3.5
ESD (Machine Model) 0.4 kV
) (W N 3.0
1
θ
Assumes the load is referenced to midsupply.
IO T JA = 48°C/W WHEN THERMAL PAD IS SOLDERED TO BOARD
2 Temperature for specified performance is −40°C to +85°C. For performance
PA 2.5
to 125°C, see the Typical Performance Characteristics section.
ISSI D
Stresses at or above those listed under Absolute Maximum
2.0 ER W
Ratings may cause permanent damage to the product. This is a
1.5
stress rating only; functional operation of the product at these
M PO MU 1.0
or any other conditions above those indicated in the operational
XI θJA = 86°C/W WHEN THERMAL PAD
section of this specification is not implied. Operation beyond
MA 0.5 IS NOT SOLDERED TO BOARD
the maximum operating conditions for extended periods may
0
affect product reliability.
–60 –40 –20 0 20 40 60 80 100 120 140
002
AMBIENT TEMPERATURE (°C) THERMAL RESISTANCE
06286- Figure 2. Maximum Power Dissipation vs. Ambient Temperature
Table 9. ESD CAUTION Exposed Pad Package θ Unit JA
CP-16-26: LFCSP, EPAD Soldered to Board 48 °C/W CP-16-26: LFCSP, EPAD Not Soldered to Board 86 °C/W
Table 10. Hidden Paddle Package θ Unit JA
CP-16-19: LFCSP 86 °C/W The θJA values in Table 9 and Table 10 assume a 4-layer JEDEC standard board. If the thermal pad is soldered to the board, it is also assumed it is connected to a plane. θJC at the exposed pad is 4.4°C/W. Rev. D | Page 9 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Maximum Power Dissipation ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION GAIN SELECTION REFERENCE TERMINAL LAYOUT Package Considerations Hidden Paddle Package Exposed Pad Package Common-Mode Rejection over Frequency Reference Power Supplies SOLDER WASH INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION RF INTERFERENCE COMMON-MODE INPUT VOLTAGE RANGE APPLICATIONS INFORMATION DRIVING AN ADC DIFFERENTIAL OUTPUT Setting the Common-Mode Voltage 2-Channel Differential Output Using a Dual Op Amp DRIVING A DIFFERENTIAL INPUT ADC First Antialiasing Filter Second Antialiasing Filter Reference DRIVING CABLING OUTLINE DIMENSIONS ORDERING GUIDE