Datasheet AD8556 (Analog Devices) - 4

AD8556 Data Sheet SPECIFICATIONS ELECTRICAL SPECIFICATIONS
VDD = 5.0 V, VSS = 0.0 V, VCM = 2.5 V, VO = 2.5 V, −40°C ≤ TA ≤ +140°C, unless otherwise specified.
Table 1. Parameter Symbol Conditions Min Typ Max Unit
INPUT STAGE Input Offset Voltage VOS −40°C ≤ TA ≤ +125°C 2 10 µV −40°C ≤ TA ≤ +140°C 3 12 µV Input Offset Voltage Drift TCVOS 25 65 nV/°C Input Bias Current IB TA = 25°C 38 49 54 nA −40°C ≤ TA ≤ +125°C 58 nA −40°C ≤ TA ≤ +140°C 60 nA Input Offset Current IOS TA = 25°C 0.2 2.5 nA −40°C ≤ TA ≤ +125°C 3.0 nA −40°C ≤ TA ≤ +140°C 4.0 nA Input Voltage Range 2.1 2.9 V Common-Mode Rejection Ratio CMRR VCM = 2.1 V to 2.9 V, AV = 70 80 92 dB VCM = 2.1 V to 2.9 V, AV = 1280 94 112 dB Linearity VO = 0.2 V to 3.4 V 20 ppm VO = 0.2 V to 4.8 V 1000 ppm Differential Gain Accuracy Second stage gain = 17.5 to 100 0.35 1.6 % Second stage gain = 140 to 200 0.5 2.5 % Differential Gain Temperature Coefficient Second stage gain = 17.5 to 100 7 20 ppm/°C Second stage gain = 140 to 200 10 40 ppm/°C RF 14 18 22 kΩ RF Temperature Coefficient 600 ppm/°C DAC Accuracy AV = 70, offset codes = 8 to 248 0.2 0.6 % Ratiometricity AV = 70, offset codes = 8 to 248 50 ppm Output Offset AV = 70, offset codes = 8 to 248 5 35 mV Temperature Coefficient −40°C ≤ TA ≤ +125°C 3.3 15 ppm FS/°C −40°C ≤ TA ≤ +140°C 25 ppm FS/°C VCLAMP Input Bias Current TA = 25°C, VCLAMP = 5 V 200 nA −40°C ≤ TA ≤ +125°C, VCLAMP = 5 V 500 nA −40°C ≤ TA ≤ +140°C, VCLAMP = 5 V 550 nA Input Voltage Range 1.2 4.94 V OUTPUT BUFFER STAGE Buffer Offset 3 7 mV Short-Circuit Current ISC 5 10 mA Output Voltage, Low VOL RL = 10 kΩ to 5 V 20 mV Output Voltage, High VOH RL = 10 kΩ to 0 V 4.94 V POWER SUPPLY Supply Current ISY −40°C ≤ TA ≤ +125°C, VO = 2.5 V, 2.0 2.7 mA VPOS = VNEG = 2.5 V, VDAC code = 128 −40°C ≤ TA ≤ +140°C, VO = 2.5 V, 2.78 mA VPOS = VNEG = 2.5 V, VDAC Code = 128 Power Supply Rejection Ratio PSRR AV = 70 109 125 dB Supply Voltage Required During Programming 10°C < TPROG < 40°C, supply capable of 5.0 5.25 5.5 V driving 250 mA Rev. B | Page 4 of 27 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION GAIN VALUES OPEN WIRE FAULT DETECTION SHORTED WIRE FAULT DETECTION FLOATING VPOS, VNEG, OR VCLAMP FAULT DETECTION DEVICE PROGRAMMING Digital Interface Initial State Simulation Mode Programming Mode Parity Error Detection Read Mode Sense Current Programming Procedure Determining Optimal Gain and Offset Codes EMI/RFI PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE