Datasheet AD8230 (Analog Devices) - 13

制造商Analog Devices
描述16 V Rail-to-Rail, Zero-Drift, Precision Instrumentation Amplifier
页数 / 页16 / 13 — AD8230. INPUT VOLTAGE RANGE. POWER SUPPLY BYPASSING. INPUT PROTECTION. …
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AD8230. INPUT VOLTAGE RANGE. POWER SUPPLY BYPASSING. INPUT PROTECTION. POWER SUPPLY BYPASSING FOR MULTIPLE. CHANNEL SYSTEMS. +VS. –VS

AD8230 INPUT VOLTAGE RANGE POWER SUPPLY BYPASSING INPUT PROTECTION POWER SUPPLY BYPASSING FOR MULTIPLE CHANNEL SYSTEMS +VS –VS

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AD8230 INPUT VOLTAGE RANGE POWER SUPPLY BYPASSING
The input common-mode range of the AD8230 is rail to rail. A regulated dc voltage should be used to power the However, the differential input voltage range is limited to instrumentation amplifier. Noise on the supply pins can approximately 750 mV. The AD8230 does not phase invert adversely affect performance. Bypass capacitors should be when its inputs are overdriven. used to decouple the amplifier.
INPUT PROTECTION
The AD8230 has internal clocked circuitry that requires The input voltage is limited to within 0.6 V beyond the supply adequate supply bypassing. A 0.1 μF capacitor should be placed rails by the internal ESD protection diodes. Resistors and low as close to each supply pin as possible. As shown in Figure 32, a leakage diodes can be used to limit excessive, external voltage 10 μF tantalum capacitor can be used further away from the part. and current from damaging the inputs, as shown in Figure 37.
POWER SUPPLY BYPASSING FOR MULTIPLE
Figure 39 shows an overvoltage protection circuit between the
CHANNEL SYSTEMS
thermocouple and the AD8230. The best way to prevent clock interference in multichannel
+VS
systems is to lay out the PCB with a star node for the positive
–VS BAV199 0.1µF
supply and a star node for the negative supply. Using such a
+V –V S S
technique, crosstalk between clocks is minimized. If laying out
0.1µF
star nodes is not feasible, use wide traces to minimize parasitic
2 4
inductance and decouple frequently along the power supply
1 2.49kΩ AD8230 8 VOUT
traces. Examples are shown in Figure 38. Care and forethought
2.49kΩ 5 7
go a long way in maximizing performance.
6 3 19.1kΩ +V –V 200Ω S S BAV199
37 0 3- 506 0 Figure 37. Overvoltage Input Protection
–VS +VS 10µF 1µF 1µF 1µF 1µF 10µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF –VS –VS –VS –VS –VS 1 8 1 8 1 8 1 8 1 8 +VS +V +VS +VS +VS 2 S 7 2 7 2 7 2 7 2 7 3 6 3 6 3 6 3 6 3 6 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 4 5 4 5 4 5 4 5 4 5 AD8230 AD8230 AD8230 AD8230 AD8230 STAR –VS 10µF STAR +VS 10µF 0.1µF 0.1µF 0.1µF 0.1µF –VS –VS –VS –VS 1 8 1 8 1 8 1 8 +VS +VS +VS +VS 2 7 2 7 2 7 2 7 3 6 3 6 3 6 3 6 0.1µF 0.1µF 0.1µF 0.1µF 4 5 4 5 4 5 4 5
38 0
AD8230 AD8230 AD8230 AD8230
3- 06 05 Figure 38. Use Star Nodes for +VS and −VS or Use Thick Traces and Decouple Frequently Along the Supply Lines Rev. B | Page 13 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION CONNECTION DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SETTING THE GAIN LEVEL-SHIFTING THE OUTPUT SOURCE IMPEDANCE AND INPUT SETTLING TIME INPUT VOLTAGE RANGE INPUT PROTECTION POWER SUPPLY BYPASSING POWER SUPPLY BYPASSING FOR MULTIPLE CHANNEL SYSTEMS LAYOUT APPLICATIONS OUTLINE DIMENSIONS ORDERING GUIDE