Datasheet AD625 (Analog Devices) - 8

AD625 THEORY OF OPERATION
The diodes to the supplies are only necessary if input voltages The AD625 is a monolithic instrumentation amplifier based on outside of the range of the supplies are encountered. In higher a modification of the classic three-op-amp approach. Monolithic gain applications where differential voltages are small, back-to- construction and laser-wafer-trimming allow the tight matching back Zener diodes and smaller resistors, as shown in Figure and tracking of circuit components. This insures the high level 26b, provides adequate protection. Figure 26c shows low cost of performance inherent in this circuit architecture. FETs with a maximum ON resistance of 300 Ω configured to offer A preamp section (Q1–Q4) provides additional gain to A1 and input protection with minimal degradation to noise, (5.2 nV/√Hz A2. Feedback from the outputs of A1 and A2 forces the collec- compared to normal noise performance of 4 nV/√Hz). tor currents of Q1–Q4 to be constant, thereby, impressing the During differential overload conditions, excess current will flow input voltage across RG. This creates a differential voltage at the through the gain sense lines (Pins 2 and 15). This will have no outputs of A1 and A2 which is given by the gain (2RF/RG + 1) effect in fixed gain applications. However, if the AD625 is being times the differential portion of the input voltage. The unity used in an SPGA application with a CMOS multiplexer, this gain subtracter, A3, removes any common-mode signal from the current should be taken into consideration. The current capa- output voltage yielding a single ended output, VOUT, referred to bilities of the multiplexer may be the limiting factor in allowable the potential at the reference pin. overflow current. The ON resistance of the switch should be The value of R included as part of RG when calculating the necessary input G is the determining factor of the transconduc- tance of the input preamp stage. As R protection resistance. G is reduced for larger gains the transconductance increases. This has three important
+VS
advantages. First, this approach allows the circuit to achieve a very high open-loop gain of (3 × 108 at programmed gains ≥ 500)
FD333 FD333 1.4k
thus reducing gain related errors. Second, the gain-bandwidth
+IN
product, which is determined by C3, C4, and the input trans-
RF
conductance, increases with gain, thereby, optimizing frequency
RG AD625 VOUT
response. Third, the input voltage noise is reduced to a value
RF
determined by the collector current of the input transistors
1.4k
(4 nV/√Hz).
–IN FD333 FD333 INPUT PROTECTION –VS
Differential input amplifiers frequently encounter input voltages Figure 26a. Input Protection Circuit outside of their linear range of operation. There are two consid- erations when applying input protection for the AD625; 1) that
+VS
continuous input current must be limited to less than 10 mA and 2) that input voltages must not exceed either supply by
FD333 FD333
more than one diode drop (approximately 0.6 V @ 25°C).
500 +IN
Under differential overload conditions there is (RG + 100) Ω in
RF 1N5837A
series with two diode drops (approximately 1.2 V) between the
RG AD625 VOUT
plus and minus inputs, in either direction. With no external protec-
1N5837A RF
tion and RG very small (i.e., 40 Ω), the maximum overload
500
voltage the AD625 can withstand, continuously, is approximately
–IN
±
FD333
2.5 V. Figure 26a shows the external components necessary to protect the AD625 under all overload conditions at any gain.
FD333 –VS +VS
Figure 26b. Input Protection Circuit for G > 5
+ 50 A VB 50 A +VS – FD333 A1 A2 10k FD333 C3 C4 SENSE +IN 10k 2k RF V 2N5952 O GAIN GAIN RG AD625 V 10k OUT DRIVE DRIVE 10k REF RF 50 R 50 F RF –IN Q1, Q3 Q2, Q4 +IN R –IN G 2k FD333 GAIN GAIN 2N5952 SENSE SENSE 50 A 50 A FD333 –VS –VS
Figure 26c. Input Protection Circuit Figure 25. Simplified Circuit of the AD625 –8– REV. D