link to page 5 Data SheetAD524SPECIFICATIONS At VS = ±15 V, RL = 2 kΩ and TA = +25°C, unless otherwise noted. All min and max specifications are guaranteed. Specifications shown in boldface are tested on all production units at the final electrical test. Results from those tests are used to calculate outgoing quality levels. Table 1.AD524AAD524BParameterMinTypMaxMinTypMaxUnit GAIN Gain Equation (External Resistor Gain Programming) 40,000 40,000 +1 ± 20% +1 ± 20% R R G G Gain Range (Pin Programmable) 1 to 1000 1 to 1000 Gain Error1 G = 1 ±0.05±0.03 % G = 10 ±0.25±0.15 % G = 100 ±0.5±0.35 % G = 1000 ±2.0±1.0 % Nonlinearity G = 1 ±0.01 ±0.005 % G = 10, G = 100 ±0.01 ±0.005 % G = 1000 ±0.01 ±0.01 % Gain vs. Temperature G = 1 5 5 ppm/°C G = 10 15 10 ppm/°C G = 100 35 25 ppm/°C G = 1000 100 50 ppm/°C VOLTAGE OFFSET (May be Nulled) Input Offset Voltage 250100 µV vs. Temperature 2 0.75 µV/°C Output Offset Voltage 5 3 mV vs. Temperature 100 50 µV/°C Offset Referred to the Input vs. Supply G = 1 7075 dB G = 10 8595 dB G = 100 95105 dB G = 1000 100110 dB INPUT CURRENT Input Bias Current ±50±25 nA vs. Temperature ±100 ±100 pA/°C Input Offset Current ±35±15 nA vs. Temperature ±100 ±100 pA/°C Rev. G | Page 3 of 25 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS CONNECTION DIAGRAMS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION INPUT PROTECTION INPUT OFFSET AND OUTPUT OFFSET GAIN INPUT BIAS CURRENTS COMMON-MODE REJECTION GROUNDING SENSE TERMINAL REFERENCE TERMINAL PROGRAMMABLE GAIN AUTO-ZERO CIRCUITS ERROR BUDGET ANALYSIS REFERENCES OUTLINE DIMENSIONS ORDERING GUIDE