Datasheet BA45F5420 (Holtek) - 8

BA45F5420 BA45F5420 9V High Voltage Smoke Detector Flash MCU 9V High Voltage Smoke Detector Flash MCU Pin Assignment
PA0/AN1/PTP/A1O/ICPDA 1 16 PA2/INT/PTCK/AN2/A1PI/ICPCK VSS/AVSS/VSS1/VSS2 2 15 A0PI VDD/AVDD 3 14 A0NI PA3/PTPB/A0PB/VREF/ENCLK 4 13 PA1/PTPI/AN0/A0O MODE 5 12 ISINK0 VREG 6 11 ISINK1 VCC 7 10 VB FB 8 9 VS
BA45F5420 16 NSOP-A
PA0/AN1/PTP/A1O/ICPDA 1 20 PA2/INT/PTCK/AN2/A1PI/ICPCK VSS/AVSS/VSS1/VSS2 2 19 A0PI VDD/AVDD 3 18 A0NI PA3/PTPB/A0PB/VREF/ENCLK 4 17 PA1/PTPI/AN0/A0O MODE 5 16 OCDSCK VREG 6 15 OCDSDA VCC 7 14 ISINK0 NC 8 13 ISINK1 NC 9 12 VB FB 10 11 VS
BA45V5420 20 SOP-A
Note: 1. If the pin-shared pin functions have multiple outputs, the desired pin-shared function is determined by the corresponding software control bits. However, the ENCLK function which is bonded to external Pin 4 , is always enable after power on. 2. The OCDSDA and OCDSCK pins are the OCDS dedicated pins and only available for the BA45V5420 device which is the OCDS EV chip for the BA45F5420 device. It should be noted that for the 16-pin NSOP package type of the device, there is no corresponding OCDS EV chip. 3. In general smoke detector applications, the VREG pin should be externally connected to the VDD pin for normal operation.
Pin Description
The function of each pin is listed in the following table, however the details behind how each pin is configured is contained in other sections of the datasheet. As the Pin Description table shows the situation for the package with the most pins, not all pins in the table will be available on smaller package sizes.
Pin Name Function OPT I/T O/T Description
PAWU PA0 PAPU ST CMOS General purpose I/O. Register enabled pull-up and PAS0 wake-up. PA0/AN1/PTP/A1O/ AN1 PAS0 AN — A/D Converter analog input channel ICPDA PTP PAS0 — CMOS PTM non-inverting output A1O PAS0 — AN OPA1 output ICPDA — ST CMOS ICP data/address PAWU PA1 PAPU ST CMOS General purpose I/O. Register enabled pull-up and PAS0 wake-up. PA1/PTPI/AN0/A0O PTPI PAS0 ST — PTM capture input AN0 PAS0 AN — A/D Converter analog input channel A0O PAS0 — AN OPA0 output Rev. 1.00 8 June 15, 2020 Rev. 1.00 9 June 15, 2020 Document Outline Features CPU Features Peripheral Features General Description Block Diagram Pin Assignment Pin Description Absolute Maximum Ratings D.C. Electrical Characteristics Operating Voltage Characteristics Standby Current Characteristics Operating Current Characteristics A.C. Electrical Characteristics High Speed Internal Oscillator – HIRC – Frequency Accuracy Low Speed Internal Oscillator Characteristics – LIRC System Start Up Time Characteristics Input/Output Characteristics Memory Characteristics Internal Reference Voltage Electrical Characteristics LVR Electrical Characteristics Sink Current Generator Electrical Characteristics Operational Amplifier Electrical Characteristics A/D Converter Electrical Characteristics LDO Electrical Characteristics Piezoelectric Horn Driver Characteristics Power-on Reset Characteristics System Architecture Clocking and Pipelining Program Counter Stack Arithmetic and Logic Unit – ALU Flash Program Memory Structure Special Vectors Look-up Table Table Program Example In Circuit Programming – ICP On-Chip Debug Support – OCDS RAM Data Memory Structure General Purpose Data Memory Special Purpose Data Memory Special Function Register Description Indirect Addressing Register – IAR0, IAR1 Memory Pointers – MP0, MP1 Accumulator – ACC Program Counter Low Register – PCL Look-up Table Registers – TBLP, TBLH Status Register – STATUS Emulated EEPROM Data Memory Emulated EEPROM Data Memory Structure Emulated EEPROM Registers Erasing the Emulated EEPROM Writing Data to the Emulated EEPROM Reading Data from the Emulated EEPROM Programming Considerations Oscillators Oscillator Overview System Clock Configurations Internal RC Oscillator – HIRC Internal 32kHz Oscillator – LIRC Operating Modes and System Clocks System Clocks System Operation Modes Control Registers Operating Mode Switching Standby Current Considerations Wake-up Watchdog Timer Watchdog Timer Clock Source Watchdog Timer Control Register Watchdog Timer Operation Reset and Initialisation Reset Functions Reset Initial Conditions Input/Output Ports Pull-high Resistors Port A Wake-up I/O Port Control Registers Sink Current Generator Pin-shared Functions I/O Pin Structures Programming Considerations Timer Modules – TM Introduction TM Operation TM Clock Source TM Interrupts TM External Pins Programming Considerations Periodic Type TM – PTM Periodic Type TM Operation Periodic Type TM Register Description Periodic Type TM Operating Modes Smoke Detector AFE Smoke Detector AFE Registers Operational Amplifier Operation Piezoel Horn Driver Analog to Digital Converter A/D Overview Registers Descriptions A/D Converter Reference Voltage A/D Converter Input Signals A/D Converter Operation Conversion Rate and Timing Diagram Summary of A/D Conversion Steps Programming Considerations A/D Transfer Function A/D Programming Examples Interrupts Interrupt Registers Interrupt Operation External Interrupt Timer Module Interrupts A/D Converter Interrupt Time Base Interrupts Interrupt Wake-up Function Programming Considerations Application Circuits External-driving Buzzer Application Circuit Self-driving Buzzer Application Circuit Instruction Set Introduction Instruction Timing Moving and Transferring Data Arithmetic Operations Logical and Rotate Operation Branches and Control Transfer Bit Operations Table Read Operations Other Operations Instruction Set Summary Table Conventions Instruction Definition Package Information 16-pin NSOP (150mil) Outline Dimensions 20-pin SOP (300mil) Outline Dimensions