Datasheet M29W040B (STMicroelectronics) - 9

M29W040B Figure 4. Data Polling Flowchart Figure 5. Data Toggle Flowchart
START START READ DQ5 & DQ7 READ DQ5 & DQ6 at VALID ADDRESS READ DQ6 DQ7 YES = DATA DQ6 NO NO = TOGGLE YES NO DQ5 = 1 NO DQ5 YES = 1 YES READ DQ7 at VALID ADDRESS READ DQ6 TWICE DQ7 YES = DQ6 NO DATA = TOGGLE NO YES FAIL PASS FAIL PASS AI01370B AI03598
Erase Timer Bit (DQ3).
The Erase Timer Bit can within the blocks being erased. Once the operation be used to identify the start of Program/Erase completes the memory returns to Read mode. Controller operation during a Block Erase com- During Erase Suspend the Alternative Toggle Bit mand. Once the Program/Erase Controller starts changes from ‘0’ to ‘1’ to ‘0’, etc. with successive erasing the Erase Timer Bit is set to ‘1’. Before the Bus Read operations from addresses within the Program/Erase Controller starts the Erase Timer blocks being erased. Bus Read operations to ad- Bit is set to ‘0’ and additional blocks to be erased dresses within blocks not being erased will output may be written to the Command Interface. The the memory cell data as if in Read mode. Erase Timer Bit is output on DQ3 when the Status After an Erase operation that causes the Error Bit Register is read. to be set the Alternative Toggle Bit can be used to
Alternative Toggle Bit (DQ2).
The Alternative identify which block or blocks have caused the er- Toggle Bit can be used to monitor the Program/ ror. The Alternative Toggle Bit changes from ‘0’ to Erase controller during Erase operations. The Al- ‘1’ to ‘0’, etc. with successive Bus Read Opera- ternative Toggle Bit is output on DQ2 when the tions from addresses within blocks that have not Status Register is read. erased correctly. The Alternative Toggle Bit does During Chip Erase and Block Erase operations the not change if the addressed block has erased cor- Toggle Bit changes from ‘0’ to ‘1’ to ‘0’, etc., with rectly. successive Bus Read operations from addresses 9/20 Document Outline Table 1. Signal Names Table 2. Absolute Maximum Ratings (1) Table 3. Uniform Block Addresses, M29W040B Table 4. Bus Operations Table 5. Commands Read/Reset. Auto Select. Program, Unlock Bypass Program, Chip Erase, Block Erase. Unlock Bypass. Unlock Bypass Reset. Erase Suspend. Erase Resume. Table 6. Program, Erase Times and Program, Erase Endurance Cycles (TA = 0 to 70˚C or –40 to 85˚C) Table 7. Status Register Bits Table 8. AC Measurement Conditions Table 9. Capacitance (TA = 25 ˚C, f = 1 MHz) Table 10. DC Characteristics (TA = 0 to 70˚C or –40 to 85˚C) Table 11. Read AC Characteristics (TA = 0 to 70˚C or –40 to 85˚C) Table 12. Write AC Characteristics, Write Enable Controlled (TA = 0 to 70˚C or –40 to 85˚C) Table 13. Write AC Characteristics, Chip Enable Controlled (TA = 0 to 70˚C or –40 to 85˚C) Table 14. Ordering Information Scheme Table 15. PLCC32 – 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data Table 16. TSOP32 – 32 lead Plastic Thin Small Outline, 8 x 20mm, Package Mechanical Data Table 17. TSOP32 – 32 lead Plastic Thin Small Outline, 8 x 14mm, Package Mechanical Data Table 18. Revision History SUMMARY DESCRIPTION SIGNAL DESCRIPTIONS Address Inputs (A0-A18). Data Inputs/Outputs (DQ0-DQ7). Chip Enable (E). Output Enable (G). Write Enable (W). VCC Supply Voltage. VSS Ground. BUS OPERATIONS Bus Read. Bus Write. Output Disable. Standby. Automatic Standby. Special Bus Operations Electronic Signature. Block Protection and Blocks Unprotection. COMMAND INTERFACE Read/Reset Command. Auto Select Command. Program Command. Unlock Bypass Command. Unlock Bypass Program Command. Unlock Bypass Reset Command. Chip Erase Command. Block Erase Command. Erase Suspend Command. Erase Resume Command. STATUS REGISTER Data Polling Bit (DQ7). Toggle Bit (DQ6). Error Bit (DQ5). Erase Timer Bit (DQ3). Alternative Toggle Bit (DQ2). Figure 1. Logic Diagram Figure 2. PLCC Connections Figure 3. TSOP Connections Figure 4. Data Polling Flowchart Figure 5. Data Toggle Flowchart Figure 6. AC Testing Input Output Waveform Figure 7. AC Testing Load Circuit Figure 8. Read Mode AC Waveforms Figure 9. Write AC Waveforms, Write Enable Controlled Figure 10. Write AC Waveforms, Chip Enable Controlled Figure 11. PLCC32 – 32 lead Plastic Leaded Chip Carrier, Package Outline Figure 12. TSOP32 – 32 lead Plastic Thin Small Outline, 8 x 20mm, Package Outline Figure 13. TSOP32 – 32 lead Plastic Thin Small Outline, 8 x 14mm, Package Outline