Datasheet ADA4610-1, ADA4610-2, ADA4610-4 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | Low Noise, Precision, Rail-to-Rail Output, JFET Single Op Amp |
| 页数 / 页 | 27 / 10 — ADA4610-1/ADA4610-2/ADA4610-4. Data Sheet. T A. T D. –IN A 1. 12 –IN D. … |
| 修订版 | I |
| 文件格式/大小 | PDF / 1.1 Mb |
| 文件语言 | 英语 |
ADA4610-1/ADA4610-2/ADA4610-4. Data Sheet. T A. T D. –IN A 1. 12 –IN D. +IN A 2. ADA4610-4. 11 +IN D. TOP. OUT A. 14 OUT D. V+ 3. 10 V–. VIEW. –IN A
该数据表的模型线
- ADA4610-1ARJZ-R2 ADA4610-1ARJZ-R7 ADA4610-1ARJZ-RL ADA4610-1ARZ ADA4610-1ARZ-R7 ADA4610-1ARZ-RL ADA4610-1BRZ ADA4610-1BRZ-R7 ADA4610-1BRZ-RL
文件文字版本
ADA4610-1/ADA4610-2/ADA4610-4 Data Sheet C T A T D C NI OU OU NI 16 15 14 13 –IN A 1 12 –IN D +IN A 2 ADA4610-4 11 +IN D TOP OUT A 1 14 OUT D V+ 3 10 V– VIEW –IN A 2 13 –IN D +IN B 4 9 +IN C +IN A 3 12 +IN D ADA4610-4 V+ 4 TOP VIEW 11 V– 5 6 7 8 (Not to Scale) +IN B 5 10 +IN C N B T B T C N C –I –I –IN B 6 9 –IN C OU OU
106
NOTES OUT B 7 8 OUT C 1. NIC = NOT INTERNALLY CONNECTED.
107 09646-
2.THE EXPOSED PAD MUST BE CONNECTED TO V–.
09646- Figure 7. ADA4610-4 Pin Configuration, 14-Lead SOIC (R Suffix) Figure 8. ADA4610-4 Pin Configuration, 16-Lead LFCSP (CP Suffix)
Table 9. ADA4610-4 P in Function Descriptions, 14-Lead SOIC and 16-Lead LFCSP Pin No. 14-Lead SOIC 16-Lead LFCSP Mnemonic Description
1 15 OUT A Output Channel A. 2 1 −IN A Inverting Input Channel A. 3 2 +IN A Noninverting Input Channel A. 4 3 V+ Positive Supply Voltage. 5 4 +IN B Noninverting Input Channel B. 6 5 −IN B Inverting Input Channel B. 7 6 OUT B Output Channel B. 8 7 OUT C Output Channel C. 9 8 −IN C Inverting Input Channel C. 10 9 +IN C Noninverting Input Channel C. 11 10 V− Negative Supply Voltage. 12 11 +IN D Noninverting Input Channel D. 13 12 −IN D Inverting Input Channel D. 14 14 OUT D Output Channel D. Not applicable 13, 16 NIC Not Internally Connected. Not applicable EPAD Exposed Pad. The exposed pad must be connected to V−. Rev. I | Page 10 of 27 Document Outline Features Applications Pin Configuration General Description Revision History Specifications Electrical Characteristics Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Comparative Voltage and Variable Voltage Graphs Theory of Operation Applications Information Input Overvoltage Protection Peak Detector Current to Voltage (I to V) Conversion Applications Photodiode Circuits Comparator Operation Long-Term Drift Temperature Hysteresis Outline Dimensions Ordering Guide
106
NOTES OUT B 7 8 OUT C 1. NIC = NOT INTERNALLY CONNECTED.
107 09646-
2.THE EXPOSED PAD MUST BE CONNECTED TO V–.
09646- Figure 7. ADA4610-4 Pin Configuration, 14-Lead SOIC (R Suffix) Figure 8. ADA4610-4 Pin Configuration, 16-Lead LFCSP (CP Suffix)
Table 9. ADA4610-4 P in Function Descriptions, 14-Lead SOIC and 16-Lead LFCSP Pin No. 14-Lead SOIC 16-Lead LFCSP Mnemonic Description
1 15 OUT A Output Channel A. 2 1 −IN A Inverting Input Channel A. 3 2 +IN A Noninverting Input Channel A. 4 3 V+ Positive Supply Voltage. 5 4 +IN B Noninverting Input Channel B. 6 5 −IN B Inverting Input Channel B. 7 6 OUT B Output Channel B. 8 7 OUT C Output Channel C. 9 8 −IN C Inverting Input Channel C. 10 9 +IN C Noninverting Input Channel C. 11 10 V− Negative Supply Voltage. 12 11 +IN D Noninverting Input Channel D. 13 12 −IN D Inverting Input Channel D. 14 14 OUT D Output Channel D. Not applicable 13, 16 NIC Not Internally Connected. Not applicable EPAD Exposed Pad. The exposed pad must be connected to V−. Rev. I | Page 10 of 27 Document Outline Features Applications Pin Configuration General Description Revision History Specifications Electrical Characteristics Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Comparative Voltage and Variable Voltage Graphs Theory of Operation Applications Information Input Overvoltage Protection Peak Detector Current to Voltage (I to V) Conversion Applications Photodiode Circuits Comparator Operation Long-Term Drift Temperature Hysteresis Outline Dimensions Ordering Guide