Datasheet ADA4857-1, ADA4857-2 (Analog Devices) - 7
| 制造商 | Analog Devices |
| 描述 | Ultralow Distortion, Low Power, Low Noise, High Speed Op Amp |
| 页数 / 页 | 21 / 7 — Data Sheet. ADA4857-1/ADA4857-2. PIN CONFIGURATIONS AND FUNCTION … |
| 修订版 | D |
| 文件格式/大小 | PDF / 559 Kb |
| 文件语言 | 英语 |
Data Sheet. ADA4857-1/ADA4857-2. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. PD 1. 8 +VS. ADA4857-1. FB 2. 7 OUT. –IN. +VS. TOP VIEW. +IN
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文件文字版本
Data Sheet ADA4857-1/ADA4857-2 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS PD 1 8 +VS FB 1 8 PD ADA4857-1 FB 2 7 OUT –IN 2 7 +VS ADA4857-1 TOP VIEW +IN 3 6 OUT –IN 3 TOP VIEW 6 NC (Not to Scale) (Not to Scale) –VS 4 5 NC +IN 4 5 –V
06
S
0 0-
NC = NO CONNECT
04 07
NOTES 1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN. 2. THE EXPOSED PAD MAY BE CONNECTED
005
TO GND OR VS.
07040- Figure 5. 8-Lead LFCSP Pin Configuration Figure 6. 8-Lead SOIC Pin Configuration
Table 5. 8-Lead LFCSP Pin Function Descriptions Table 6. 8-Lead SOIC Pin Function Descriptions Pin No. Mnemonic Description Pin No. Mnemonic Description
1 PD Power Down. 1 FB Feedback. 2 FB Feedback. 2 −IN Inverting Input. 3 −IN Inverting Input. 3 +IN Noninverting Input. 4 +IN Noninverting Input. 4 −VS Negative Supply. 5 −VS Negative Supply. 5 NC No Connect. 6 NC No Connect. 6 OUT Output. 7 OUT Output. 7 +VS Positive Supply. 8 +VS Positive Supply. 8 PD Power Down. EP GND or VS Exposed Pad. The exposed pad may be connected to GND or VS. Rev. D | Page 7 of 21 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAMS GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ±5 V SUPPLY +5 V SUPPLY ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS APPLICATIONS INFORMATION POWER-DOWN OPERATION CAPACITIVE LOAD CONSIDERATIONS RECOMMENDED VALUES FOR VARIOUS GAINS ACTIVE LOW-PASS FILTER (LPF) NOISE CIRCUIT CONSIDERATIONS PCB LAYOUT POWER SUPPLY BYPASSING GROUNDING OUTLINE DIMENSIONS ORDERING GUIDE
06
S
0 0-
NC = NO CONNECT
04 07
NOTES 1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN. 2. THE EXPOSED PAD MAY BE CONNECTED
005
TO GND OR VS.
07040- Figure 5. 8-Lead LFCSP Pin Configuration Figure 6. 8-Lead SOIC Pin Configuration
Table 5. 8-Lead LFCSP Pin Function Descriptions Table 6. 8-Lead SOIC Pin Function Descriptions Pin No. Mnemonic Description Pin No. Mnemonic Description
1 PD Power Down. 1 FB Feedback. 2 FB Feedback. 2 −IN Inverting Input. 3 −IN Inverting Input. 3 +IN Noninverting Input. 4 +IN Noninverting Input. 4 −VS Negative Supply. 5 −VS Negative Supply. 5 NC No Connect. 6 NC No Connect. 6 OUT Output. 7 OUT Output. 7 +VS Positive Supply. 8 +VS Positive Supply. 8 PD Power Down. EP GND or VS Exposed Pad. The exposed pad may be connected to GND or VS. Rev. D | Page 7 of 21 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAMS GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ±5 V SUPPLY +5 V SUPPLY ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS APPLICATIONS INFORMATION POWER-DOWN OPERATION CAPACITIVE LOAD CONSIDERATIONS RECOMMENDED VALUES FOR VARIOUS GAINS ACTIVE LOW-PASS FILTER (LPF) NOISE CIRCUIT CONSIDERATIONS PCB LAYOUT POWER SUPPLY BYPASSING GROUNDING OUTLINE DIMENSIONS ORDERING GUIDE