Datasheet AD8016 (Analog Devices) - 3
制造商 | Analog Devices |
描述 | Full Rate ADSL Line Driver With Powerdown |
页数 / 页 | 20 / 3 — Data Sheet. AD8016. SPECIFICATIONS. Table 1. Parameter. Test … |
修订版 | C |
文件格式/大小 | PDF / 492 Kb |
文件语言 | 英语 |
Data Sheet. AD8016. SPECIFICATIONS. Table 1. Parameter. Test Conditions/Comments. Min. Typ. Max. Unit
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Data Sheet AD8016 SPECIFICATIONS
@ 25°C, VS = ±12 V, RL = 100 Ω, PWDN0, PWDN1 = (1, 1), TMIN = −40°C, TMAX = +85°C, unless otherwise noted.
Table 1. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Bandwidth G = +1, RF = 1.5 kΩ, VOUT = 0.2 V p-p 380 MHz G = +5, RF = 499 Ω, VOUT < 0.5 V p-p 69 78 MHz Bandwidth for 0.1 dB Flatness G = +5, RF = 499 Ω, VOUT = 0.2 V p-p 16 38 MHz Large Signal Bandwidth VOUT = 4 V p-p 90 MHz Peaking VOUT = 0.2 V p-p < 50 MHz 0.1 dB Slew Rate VOUT = 4 V p-p, G = +2 1000 V/μs Rise and Fall Time VOUT = 2 V p-p 2 ns Settling Time 0.1%, VOUT = 2 V p-p 23 ns Input Overdrive Recovery Time VOUT = 12.5 V p-p 350 ns NOISE/DISTORTION PERFORMANCE Distortion, Single-Ended VOUT = 2 V p-p, G = +5, RF = 499 Ω Second Harmonic fC = 1 MHz, RL = 100 Ω/25 Ω −75/−62 −77/−64 dBc Third Harmonic fC = 1 MHz, RL = 100 Ω/25 Ω −88/−74 −93/−76 dBc Multitone Power Ratio1 26 kHz to 1.1 MHz, ZLINE = 100 Ω, PLINE = 20.4 dBm –75 dBc IMD 500 kHz, Δf = 10 kHz, RL = 100 Ω/25 Ω −84/−80 −88/−85 dBc IP3 500 kHz, RL = 100 Ω/25 Ω 42/40 43/41 dBm Voltage Noise (RTI) f = 10 kHz 2.6 4.5 nV/√Hz Input Current Noise f = 10 kHz 18 21 pA√Hz INPUT CHARACTERISTICS RTI Offset Voltage −3.0 1.0 +3.0 mV +Input Bias Current −45 +45 μA –Input Bias Current −75 4 +75 μA Input Resistance 400 kΩ Input Capacitance 2 pF Input Common-Mode Voltage Range −10 +10 V Common-Mode Rejection Ratio 58 64 dB OUTPUT CHARACTERISTICS Output Voltage Swing Single-ended, RL = 100 Ω −11 +11 V Linear Output Current G = 5, RL = 10 Ω, f1 = 100 kHz, −60 dBc SFDR 400 600 mA Short-Circuit Current 2000 mA Capacitive Load Drive 80 pF POWER SUPPLY Operating Range ±3 ±13 V Quiescent Current PWDN1, PWDN0 = (1, 1) 12.5 13.2 mA/Amp PWDN1, PWDN0 = (1, 0) 8 10 mA/Amp PWDN1, PWDN0 = (0, 1) 5 8 mA/Amp PWDN1, PWDN0 = (0, 0) 4 6 mA/Amp Recovery Time To 95% of IQ 25 μs Shutdown Current 250 μA out of bias pin 1.5 4.0 mA/Amp Power Supply Rejection Ratio ΔVS = ±1 V 63 75 dB OPERATING TEMPERATURE RANGE −40 +85 °C 1 See Figure 48, R20, R21 = 0 Ω, R1 = open. Rev. C | Page 3 of 20 Document Outline Features Pin Configurations General Description Revision History Specifications Logic Inputs (CMOS Compatible Logic) Absolute Maximum Ratings Maximum Power Dissipation ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Test Circuts Theory of Operation Power Supply and Decoupling Feedback Resistor Selection Bias Pin and PWDN Features Thermal Shutdown Applications Information Multitone Power Ratio (MTPR) Generating DMT Power Dissipation Thermal Enhancements and PCB Layout Thermal Testing Air Flow Test Conditions DUT Power Thermal Resistance PCB Dimensions of a Differential Driver Circuit Experimental Results Outline Dimensions Ordering Guide