Datasheet AD8004 (Analog Devices) - 10

AD8004 DRIVING CAPACITIVE LOADS
In noninverting gains, the effect of extra capacitance on The AD8004 was designed primarily to drive nonreactive loads. summing junctions is far more pronounced than with inverting If driving loads with a capacitive component is desired, best gains. Figure 9 shows an example of this. Note that only 1 pF of settling response is obtained by the addition of a small series added junction capacitance causes about a 70% bandwidth resistance as shown in Figure 6. The accompanying graph shows extension and additional peaking on a gain = +2. For an inverting the optimum value for RSERIES vs. capacitive load. It is worth gain = –2, 5 pF of additional summing junction capacitance noting that the frequency response of the circuit when driving caused a small 10% bandwidth extension. large capacitive loads will be dominated by the passive roll-off of RSERIES and CL. Extra output capacitive loading also causes bandwidth exten-
1k
⍀ sions and peaking. The effect is more pronounced with less resistive loading from the next stage. Figure 10 shows the effect
RSERIES
of direct output capacitive loads for gains of +2 and –2. For both
1k
⍀
AD8004
gains CLOAD was set to 10 pF or 0 pF (no extra capacitive loading).
RL
For each of the four traces in Figure 10 the resistive loads were
1k
⍀
CL
100 ⍀. Figure 11 also shows capacitive loading effects with a lighter output resistive load. Note that even though bandwidth Figure 6. Driving Capacitive Load is extended 2 ¥, the flatness dramatically suffers.
40 2 RF = 698
⍀
1 G = +1 RF = 1.1k
⍀
0 RF = 909
⍀
–1 30
⍀
1 R –2 F = 604
⍀
– G = +2 0 –3 SERIESR –1 –4 VIN = 50mV rms R GAIN – dB, G = +1 20 F = 1.10k
⍀
–2 VS =
ⴞ
5V –5 RL = 100
⍀
–3 R PACKAGE –6 RF = 845
⍀
–4 –7 10 NORMALIZED GAIN – dB, G = +2 –5 –8 0 5 10 15 20 25 1 10 40 100 500 FREQUENCY – MHz CL – pF
Figure 7. Recommended R Figure 8. RFEEDBACK vs. Frequency Response, G = +1/+2 SERIES vs. Capacitive Load for £ 30 ns Settling to 0.1%
2 OPTIMIZING FLATNESS G = +2 CJ = 1pF
The fine scale gain flatness and –3 dB bandwidth is affected by
0
R
C
FEEDBACK selection as is normal of current feedback amplifiers.
2 J = 0 –2
With the exception of gain = +1, the AD8004 can be adjusted
G = –2 0 –4
for either maximal flatness with modest closed-loop bandwidth
–6
or for mildly peaked-up frequency response with much more
–2 VIN = 50mV rms
bandwidth. Figure 8 shows the effect of three evenly spaced R
–4 R –8
F
L = 100
⍀ changes upon gain = +1 and gain = +2. Table I shows the ⴞ
5VS CJ = 5.1pF –6 –10
recommended component values for achieving maximally flat
–8 –12
frequency response as well as a faster slightly peaked-up fre-
NORMALIZED GAIN – dB, G = +2 CJ = 0
quency response.
–10 –14
Printed circuit board parasitics and device lead frame parasitics
NORMALIZED GAIN – dB, G = –2 –12
also control fine scale gain flatness. In the printed circuit board
–141 10 40 100 500
environment, parasitics such as extra capacitance caused by two
FREQUENCY – MHz
parallel and vertical flat conductors on opposite PC board Figure 9. Frequency Response vs. Added Summing sides in the region of the summing junction wil cause some Junction Capacitance bandwidth extension and/or increased peaking. –10– REV. D Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION CONNECTION DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE MAXIMUM POWER DISSIPATION Typical Performance Characteristics THEORY OF OPERATION DC AND AC CHARACTERISTICS DRIVING CAPACITIVE LOADS OPTIMIZING FLATNESS DRIVING A SINGLE-SUPPLY A/D CONVERTER LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS Revision History