Datasheet AD8001 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | 800 MHz, 50 mW Current Feedback Amplifier |
| 页数 / 页 | 16 / 9 — AD8001. –10. 910. CURVES ARE FOR WORST- CASE CONDITION WHERE. +PSRR. VIN. … |
| 修订版 | D |
| 文件格式/大小 | PDF / 305 Kb |
| 文件语言 | 英语 |
AD8001. –10. 910. CURVES ARE FOR WORST- CASE CONDITION WHERE. +PSRR. VIN. ONE SUPPLY IS VARIED. 150. WHILE THE OTHER IS. –20. VOUT
该数据表的模型线
文件文字版本
AD8001 30 –10 910 20 CURVES ARE FOR WORST- CASE CONDITION WHERE +PSRR 910 VIN 51 10 ONE SUPPLY IS VARIED 150 WHILE THE OTHER IS –20 VOUT 0 HELD CONSTANT. 62 150 –10 –30 –20 –PSRR CMRR – dB PSRR – dB –30 –PSRR –40 +PSRR –40 RF = 909 G = +2 –50 –50 –60 300k 1M 10M 100M 1G 1M 10M 100M 1G FREQUENCY – Hz FREQUENCY – Hz
TPC 31. CMRR vs. Frequency TPC 34. PSRR vs. Frequency
1 RF = 549 0 –1 RF = 649 –2 –3 G = –2 –4 RL = 100 V R IN = 50mVrms F = 750 –5 OUTPUT – dB –6 –7 –8 –91M 10M 100M 1G FREQUENCY – Hz
TPC 32. –3 dB Bandwidth vs. Frequency, G = –2 TPC 35. 2 V Step Response, G = –1
100 100 90 3 WAFER LOTS 90 COUNT = 895 80 MEAN = 1.37 80 STD DEV = 1.13 CUMULATIVE MIN = –2.45 70 70 MAX = +4.69 60 60 50 50 COUNT FREQ DIST 40 40 PERCENT 30 30 20 20 10 10 0 0 –5 –4 –3 –2 –1 0 1 2 3 4 5 INPUT OFFSET VOLTAGE – mV
TPC 33. 100 mV Step Response, G = –1 TPC 36. Input Offset Voltage Distribution REV. D –9– Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE MAXIMUM POWER DISSIPATION Typical Performance Characteristics THEORY OF OPERATION Choice of Feedback and Gain Resistors Printed Circuit Board Layout Considerations Power Supply Bypassing DC Errors and Noise Driving Capacitive Loads Communications Operation as a Video Line Driver Driving A-to-D Converters Layout Considerations OUTLINE DIMENSIONS Revision History
TPC 31. CMRR vs. Frequency TPC 34. PSRR vs. Frequency
1 RF = 549 0 –1 RF = 649 –2 –3 G = –2 –4 RL = 100 V R IN = 50mVrms F = 750 –5 OUTPUT – dB –6 –7 –8 –91M 10M 100M 1G FREQUENCY – Hz
TPC 32. –3 dB Bandwidth vs. Frequency, G = –2 TPC 35. 2 V Step Response, G = –1
100 100 90 3 WAFER LOTS 90 COUNT = 895 80 MEAN = 1.37 80 STD DEV = 1.13 CUMULATIVE MIN = –2.45 70 70 MAX = +4.69 60 60 50 50 COUNT FREQ DIST 40 40 PERCENT 30 30 20 20 10 10 0 0 –5 –4 –3 –2 –1 0 1 2 3 4 5 INPUT OFFSET VOLTAGE – mV
TPC 33. 100 mV Step Response, G = –1 TPC 36. Input Offset Voltage Distribution REV. D –9– Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE MAXIMUM POWER DISSIPATION Typical Performance Characteristics THEORY OF OPERATION Choice of Feedback and Gain Resistors Printed Circuit Board Layout Considerations Power Supply Bypassing DC Errors and Noise Driving Capacitive Loads Communications Operation as a Video Line Driver Driving A-to-D Converters Layout Considerations OUTLINE DIMENSIONS Revision History