Datasheet OP285 (Analog Devices) - 8

制造商Analog Devices
描述Dual 9 MHz Precision Operational Amplifier
页数 / 页15 / 8 — OP285. +15V. Measuring Settling Time. 0.1. 1/2. + 7A13 PLUG-IN. –15V. …
修订版C
文件格式/大小PDF / 328 Kb
文件语言英语

OP285. +15V. Measuring Settling Time. 0.1. 1/2. + 7A13 PLUG-IN. –15V. 7A13 PLUG-IN. 300pF. 15V. REF|. OUT. TTL. INPUT. 1.5k. 2N3904. 1N4148. 2N2907. 1.8k

OP285 +15V Measuring Settling Time 0.1 1/2 + 7A13 PLUG-IN –15V 7A13 PLUG-IN 300pF 15V REF| OUT TTL INPUT 1.5k 2N3904 1N4148 2N2907 1.8k

该数据表的模型线

文件文字版本

OP285 +15V Measuring Settling Time 0.1 F
The design of OP285 combines high slew rate and wide gain-
3 8 +
bandwidth product to produce a fast-settling (ts < l µs) amplifier
1 1/2 + 7A13 PLUG-IN OP285
for 8- and 12-bit applications. The test circuit designed to measure
2 0.1 F
the settling time of the OP285 is shown in Figure 7. This test
4
method has advantages over false-sum node techniques in that
* –15V
the actual output of the amplifier is measured, instead of an
7A13 PLUG-IN
error voltage at the sum node. Common-mode settling effects are exercised in this circuit in addition to the slew rate and
300pF 1k
bandwidth effects measured by the false-sum-node method. Of
15V |V I REF| OUT
course, a reasonably flat-top pulse is required as the stimulus.
TTL 1k INPUT 1.5k 2N3904
The output waveform of the OP285 under test is clamped by Schottky diodes and buffered by the JFET source follower.
1N4148 2N2907 10 F+ 1k
The signal is amplified by a factor of ten by the OP260 and
1.8k
then Schottky-clamped at the output to prevent overloading
15V 220
the oscilloscope’s input amplifier. The OP41 is configured as
0.47 F
a fast integrator which provides overall dc offset nulling.
0.1 F High Speed Operation 0.01 F
As with most high speed amplifiers, care should be taken with
*NOTE V DECOUPLE CLOSE REF
supply decoupling, lead dress, and component placement. Rec-
TOGETHER ON GROUND PLAN (–1V) WITH SHORT LEAD LENGTHS.
ommended circuit configurations for inverting and noninverting applications are shown in Figures 8 and Figure 9. Figure 5. Transient Output Load Current Test Fixture
+15V 10 F + A1 1,2 V T 138.9NS 0.1 F 100 90 TTL CTRL (5V/ DIV) 2 – 8 1/2 1 VOUT 10V V OP285 IN 3 + VOUT R 10 4 L (2MV/ DIV) 0% 15k 5V 2MV 50NS 0.1 F 10 F
Figure 6. OP285’s Output Load Current Recovery Time
–15V
Figure 8. Unity Gain Follower
16–20V + +15V 1k OUTPUT 0.1 F (TO SCOPE) V+ D3 D4 RL 1k DUT 2N4416 1/2 OP260AJ V– D1 D2 1 F 0.1 F RF 2k 10k + RG IC2 16–20V 222 10k 5V 2N2222A 750 1N4148 15k SCHOTTKY DIODES D1–D4 ARE HEWLETT-PACKARD HP5082-2835 IC1 IS 1/2 OP260AJ –15V IC2 IS PMI OP41EJ
Figure 7. OP285’s Settling Time Test Fixture –8– REV. C