AD7431001003.51508080140PHASEs)6060 3.01304040GAIN12020202.5SLEW RATE (V/OPEN-LOOP GAIN (dB)OPEN-LOOP GAIN (dB)PHASE MARGIN (Degrees)10000–20–202.0801001k10k100k1M10M100M–60 –40 –20020406080 100 120 14005101520SUPPLY VOLTAGE ( ⴞ V)FREQUENCY (Hz)TEMPERATURE ( ⴗ C) TPC 10. Open-Loop Gain and TPC 11. Slew Rate vs. Temperature TPC 12. Open-Loop Gain vs. Phase vs. Frequency (Gain = –1) Supply Voltage, RLOAD = 2 kΩ 1201203530100100VCM = ⴞ 10V258080R+ SUPPLYL = 2k ⍀ 20606015404010– SUPPLYOUTPUT VOLTAGE (V p-p)2020COMMON-MODE REJECTION (dB)POWER SUPPLY REJECTION (dB)50001001k10k100k1M1001k10k100k1M10M100M101001k10kFREQUENCY (Hz)FREQUENCY (Hz)FREQUENCY (Hz) TPC 13. Common-Mode TPC 14. Power Supply Rejection TPC 15. Large Signal Frequency Rejection vs. Frequency vs. Frequency Response ))–70Hz 1001kHz–80CLOSED-LOOP GAIN = ⴙ 1–9010100–100GAIN = +10–110THD (dB)101–120CLOSED-LOOP GAIN = ⴙ 10GAIN = –1–130–1401101001k10k100k0.1CURRENT NOISE SPECTRAL DENSITY (fA/1101001k10k100k1101001k10k100k1M10MFREQUENCY (Hz)VOLTAGE NOISE (PREFERRED TO INPUT) (nV/FREQUENCY (Hz)FREQUENCY (Hz) TPC 16. Total Harmonic Distortion TPC 17. Input Voltage Noise TPC 18. Input Current Noise vs. Frequency Spectral Density Spectral Density REV. E –5– Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION PRODUCT HIGHLIGHTS CONNECTION DIAGRAMS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD SUSCEPTIBILITY ORDERING GUIDE Typical Performance Characteristics OP AMP PERFORMANCE: JFET VS. BIPOLAR DESIGNING CIRCUITS FOR LOW NOISE LOW NOISE CHARGE AMPLIFIERS HOW CHIP PACKAGE TYPE AND POWER DISSIPATION AFFECT INPUT BIAS CURRENT REDUCED POWER SUPPLY OPERATION FOR LOWER IB AN INPUT IMPEDANCE COMPENSATED, SALLEN-KEY FILTER TWO HIGH PERFORMANCE ACCELEROMETER AMPLIFIERS LOW NOISE HYDROPHONE AMPLIFIER BALANCING SOURCE IMPEDANCES OUTLINE DIMENSIONS Revision History