Datasheet OP77 (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | Next Generation OP07, Ultralow Offset Voltage Operational Amplifier |
| 页数 / 页 | 16 / 4 — OP77. Data Sheet. Table 2. OP77E. OP77F. Parameter. Symbol Conditions. … |
| 修订版 | G |
| 文件格式/大小 | PDF / 383 Kb |
| 文件语言 | 英语 |
OP77. Data Sheet. Table 2. OP77E. OP77F. Parameter. Symbol Conditions. Min. Typ. Max Min. Max Unit. WAFER TEST LIMITS. Table 3. Parameter. Symbol
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文件文字版本
OP77 Data Sheet
@ VS = ±15 V, −25°C ≤ TA ≤ +85°C for OP77FJ and OP77E/OP77F, unless otherwise noted.
Table 2. OP77E OP77F Parameter Symbol Conditions Min Typ Max Min Typ Max Unit
INPUT OFFSET VOLTAGE VOS 10 45 20 100 µV AVERAGE INPUT OFFSET VOLTAGE DRIFT1 TCVOS 0.1 0.3 0.2 0.6 µV/°C INPUT OFFSET CURRENT IOS 0.5 2.2 0.5 4.5 nA AVERAGE INPUT OFFSET CURRENT DRIFT2 TCIOS 1.5 4.0 1.5 85 pA/°C INPUT BIAS CURRENT IB −0.2 +2.4 +4.0 −0.2 +2.4 +6.0 nA AVERAGE INPUT BIAS CURRENT DRIFT2 TCIB 8 40 15 60 pA/°C INPUT VOLTAGE RANGE IVR ±13.0 ±13.5 ±13.0 ±13.5 V COMMON-MODE REJECTION RATIO CMRR VCM = ±13 V 0.1 1.0 0.1 3.0 pV/V POWER SUPPLY REJECTION RATIO PSRR VS = ±3 V to ±18 V 1.0 3.0 1.0 5.0 µV/V LARGE-SIGNAL VOLTAGE GAIN AVO RL ≥ 2 kΩ 2000 6000 1000 4000 V/mV VO = ±10 V OUTPUT VOLTAGE SWING VO RL ≥ 2 kΩ ±12 ±13.0 ±12 ±13.0 V POWER CONSUMPTION Pd VS = ±15 V, no load 60 75 60 75 mW 1 OP77E: TCVOS is 100% tested on J and Z packages. 2 Guaranteed by end-point limits.
WAFER TEST LIMITS
@ VS = ±15 V, TA = 25°C, for OP77NBC devices, unless otherwise noted.
Table 3. Parameter Symbol Conditions OP77NBC L imit Unit
INPUT OFFSET VOLTAGE VOS 40 µV max INPUT OFFSET CURRENT IOS 2.0 nA max INPUT BIAS CURRENT IB ±2 nA max INPUT RESISTANCE Differential Mode RIN 26 MΩ min INPUT VOLTAGE RANGE IVR ±13 V min COMMON-MODE REJECTION RATIO CMRR VCM = ±13 V 1 µV/V max POWER SUPPLY REJECTION RATIO PSRR VS = ±3 V to ±18 V 3 µV/V max OUTPUT VOLTAGE SWING VO RL = 10 kΩ ±13.5 V min RL = 2 kΩ ±12.5 RL = 1 kΩ ±12.0 LARGE-SIGNAL VOLTAGE GAIN AVO RL = 2 kΩ 2000 V/mV min VO = ±10 V DIFFERENTIAL INPUT VOLTAGE ±30 V max POWER CONSUMPTION Pd VO = 0 V 60 mW max Rev. G | Page 4 of 16 Document Outline Features Pin Connections General Description Table of Contents Revision History Specifications Electrical Specifications Wafer Test Limits Typical Electrical Characteristics Absolute Maximum Ratings Thermal Resistance ESD Caution Typical Performance Characteristics Test Circuits Applications Precision Current Sinks Outline Dimensions Ordering Guide
@ VS = ±15 V, −25°C ≤ TA ≤ +85°C for OP77FJ and OP77E/OP77F, unless otherwise noted.
Table 2. OP77E OP77F Parameter Symbol Conditions Min Typ Max Min Typ Max Unit
INPUT OFFSET VOLTAGE VOS 10 45 20 100 µV AVERAGE INPUT OFFSET VOLTAGE DRIFT1 TCVOS 0.1 0.3 0.2 0.6 µV/°C INPUT OFFSET CURRENT IOS 0.5 2.2 0.5 4.5 nA AVERAGE INPUT OFFSET CURRENT DRIFT2 TCIOS 1.5 4.0 1.5 85 pA/°C INPUT BIAS CURRENT IB −0.2 +2.4 +4.0 −0.2 +2.4 +6.0 nA AVERAGE INPUT BIAS CURRENT DRIFT2 TCIB 8 40 15 60 pA/°C INPUT VOLTAGE RANGE IVR ±13.0 ±13.5 ±13.0 ±13.5 V COMMON-MODE REJECTION RATIO CMRR VCM = ±13 V 0.1 1.0 0.1 3.0 pV/V POWER SUPPLY REJECTION RATIO PSRR VS = ±3 V to ±18 V 1.0 3.0 1.0 5.0 µV/V LARGE-SIGNAL VOLTAGE GAIN AVO RL ≥ 2 kΩ 2000 6000 1000 4000 V/mV VO = ±10 V OUTPUT VOLTAGE SWING VO RL ≥ 2 kΩ ±12 ±13.0 ±12 ±13.0 V POWER CONSUMPTION Pd VS = ±15 V, no load 60 75 60 75 mW 1 OP77E: TCVOS is 100% tested on J and Z packages. 2 Guaranteed by end-point limits.
WAFER TEST LIMITS
@ VS = ±15 V, TA = 25°C, for OP77NBC devices, unless otherwise noted.
Table 3. Parameter Symbol Conditions OP77NBC L imit Unit
INPUT OFFSET VOLTAGE VOS 40 µV max INPUT OFFSET CURRENT IOS 2.0 nA max INPUT BIAS CURRENT IB ±2 nA max INPUT RESISTANCE Differential Mode RIN 26 MΩ min INPUT VOLTAGE RANGE IVR ±13 V min COMMON-MODE REJECTION RATIO CMRR VCM = ±13 V 1 µV/V max POWER SUPPLY REJECTION RATIO PSRR VS = ±3 V to ±18 V 3 µV/V max OUTPUT VOLTAGE SWING VO RL = 10 kΩ ±13.5 V min RL = 2 kΩ ±12.5 RL = 1 kΩ ±12.0 LARGE-SIGNAL VOLTAGE GAIN AVO RL = 2 kΩ 2000 V/mV min VO = ±10 V DIFFERENTIAL INPUT VOLTAGE ±30 V max POWER CONSUMPTION Pd VO = 0 V 60 mW max Rev. G | Page 4 of 16 Document Outline Features Pin Connections General Description Table of Contents Revision History Specifications Electrical Specifications Wafer Test Limits Typical Electrical Characteristics Absolute Maximum Ratings Thermal Resistance ESD Caution Typical Performance Characteristics Test Circuits Applications Precision Current Sinks Outline Dimensions Ordering Guide