Datasheet ADP1874, ADP1875 (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | Synchronous Buck Controller with Constant On-Time, Valley Current Mode, and Power Saving Mode |
| 页数 / 页 | 44 / 6 — ADP1874/ADP1875. Data Sheet. ABSOLUTE MAXIMUM RATINGS Table 2. THERMAL … |
| 修订版 | A |
| 文件格式/大小 | PDF / 1.8 Mb |
| 文件语言 | 英语 |
ADP1874/ADP1875. Data Sheet. ABSOLUTE MAXIMUM RATINGS Table 2. THERMAL RESISTANCE. Parameter. Rating. Table 3. Thermal Resistance
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ADP1874/ADP1875 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 2. THERMAL RESISTANCE Parameter Rating
θJA is specified for the worst-case conditions, that is, a device VREG, VREG_IN, TRACK to PGND, GND −0.3 V to +6 V soldered in a circuit board for surface-mount packages. VIN, EN, PGOOD to PGND −0.3 V to +28 V FB, COMP, RES, SS to GND −0.3 V to (VREG + 0.3 V)
Table 3. Thermal Resistance
DRVL to PGND −0.3 V to (VREG + 0.3 V)
Package Type θ Unit JA
SW to PGND −2.0 V to +28 V θ (16-Lead QSOP) JA BST to SW −0.6 V to (VREG + 0.3 V) 4-Layer Board 104° °C/W BST to PGND −0.3 V to +28 V DRVH to SW −0.3 V to VREG
BOUNDARY CONDITION
PGND to GND ±0.3 V PGOOD Input Current 20 mA In determining the values given in Table 2 and Table 3, natural θ (16-Lead QSOP) convection is used to transfer heat to a 4-layer evaluation board. JA 4-Layer Board 104°C/W Operating Junction Temperature Range −40°C to +125°C
ESD CAUTION
Storage Temperature Range −65°C to +150°C Soldering Conditions JEDEC J-STD-020 Maximum Soldering Lead Temperature 300°C (10 sec) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratings apply individually only, not in combination. Unless otherwise specified, all other voltages are referenced to PGND. Rev. A | Page 6 of 44 Document Outline Features Applications General Description Typical Applications Circuit Table of Contents Revision History Specifications Absolute Maximum Ratings Thermal Resistance Boundary Condition ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics ADP1874/ADP1875 Block Digram Theory of Operation Startup Soft Start Precision Enable Circuitry Undervoltage Lockout On-Board Low Dropout Regulator Thermal Shutdown Programming Resistor (RES) Detect Circuit Valley Current-Limit Setting Hiccup Mode During Short Circuit Synchronous Rectifier ADP1875 Power Saving Mode (PSM) Timer Operation Pseudo-Fixed Frequency Power Good Monitoring Voltage Tracking Applications Information Feedback Resistor Divider Inductor Selection Output Ripple Voltage (ΔVRR) Output Capacitor Selection Compensation Network Output Filter Impedance (ZFILT) Error Amplifier Output Impedance (ZCOMP) Error Amplifier Gain (Gm) Current-Sense Loop Gain (GCS) Crossover Frequency Efficiency Consideration Channel Conduction Loss MOSFET Driver Loss Switching Loss Diode Conduction Loss Inductor Loss Input Capacitor Selection Thermal Considerations Design Example Input Capacitor Inductor Current Limit Programming Output Capacitor Feedback Resistor Network Setup Compensation Network Loss Calculations External Component Recommendations Layout Considerations IC Section (Left Side of Evaluation Board) Power Section Differential Sensing Typical Application Circuits 12 A, 300 kHz High Current Application Circuit 5.5 V Input, 600 kHz Application Circuit 300 kHz High Current Application Circuit Outline Dimensions Ordering Guide
ADP1874/ADP1875 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 2. THERMAL RESISTANCE Parameter Rating
θJA is specified for the worst-case conditions, that is, a device VREG, VREG_IN, TRACK to PGND, GND −0.3 V to +6 V soldered in a circuit board for surface-mount packages. VIN, EN, PGOOD to PGND −0.3 V to +28 V FB, COMP, RES, SS to GND −0.3 V to (VREG + 0.3 V)
Table 3. Thermal Resistance
DRVL to PGND −0.3 V to (VREG + 0.3 V)
Package Type θ Unit JA
SW to PGND −2.0 V to +28 V θ (16-Lead QSOP) JA BST to SW −0.6 V to (VREG + 0.3 V) 4-Layer Board 104° °C/W BST to PGND −0.3 V to +28 V DRVH to SW −0.3 V to VREG
BOUNDARY CONDITION
PGND to GND ±0.3 V PGOOD Input Current 20 mA In determining the values given in Table 2 and Table 3, natural θ (16-Lead QSOP) convection is used to transfer heat to a 4-layer evaluation board. JA 4-Layer Board 104°C/W Operating Junction Temperature Range −40°C to +125°C
ESD CAUTION
Storage Temperature Range −65°C to +150°C Soldering Conditions JEDEC J-STD-020 Maximum Soldering Lead Temperature 300°C (10 sec) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratings apply individually only, not in combination. Unless otherwise specified, all other voltages are referenced to PGND. Rev. A | Page 6 of 44 Document Outline Features Applications General Description Typical Applications Circuit Table of Contents Revision History Specifications Absolute Maximum Ratings Thermal Resistance Boundary Condition ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics ADP1874/ADP1875 Block Digram Theory of Operation Startup Soft Start Precision Enable Circuitry Undervoltage Lockout On-Board Low Dropout Regulator Thermal Shutdown Programming Resistor (RES) Detect Circuit Valley Current-Limit Setting Hiccup Mode During Short Circuit Synchronous Rectifier ADP1875 Power Saving Mode (PSM) Timer Operation Pseudo-Fixed Frequency Power Good Monitoring Voltage Tracking Applications Information Feedback Resistor Divider Inductor Selection Output Ripple Voltage (ΔVRR) Output Capacitor Selection Compensation Network Output Filter Impedance (ZFILT) Error Amplifier Output Impedance (ZCOMP) Error Amplifier Gain (Gm) Current-Sense Loop Gain (GCS) Crossover Frequency Efficiency Consideration Channel Conduction Loss MOSFET Driver Loss Switching Loss Diode Conduction Loss Inductor Loss Input Capacitor Selection Thermal Considerations Design Example Input Capacitor Inductor Current Limit Programming Output Capacitor Feedback Resistor Network Setup Compensation Network Loss Calculations External Component Recommendations Layout Considerations IC Section (Left Side of Evaluation Board) Power Section Differential Sensing Typical Application Circuits 12 A, 300 kHz High Current Application Circuit 5.5 V Input, 600 kHz Application Circuit 300 kHz High Current Application Circuit Outline Dimensions Ordering Guide