Datasheet ADP1828 (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | Synchronous Buck PWM, Step-Down, DC-to-DC Controller |
| 页数 / 页 | 33 / 6 — ADP1828. Data Sheet. ABSOLUTE MAXIMUM RATINGS Table 2. Parameter. Rating. … |
| 修订版 | E |
| 文件格式/大小 | PDF / 908 Kb |
| 文件语言 | 英语 |
ADP1828. Data Sheet. ABSOLUTE MAXIMUM RATINGS Table 2. Parameter. Rating. ESD CAUTION
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ADP1828 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 2.
Stresses at or above those listed under Absolute Maximum
Parameter Rating
Ratings may cause permanent damage to the product. This is a IN −0.3 V to +20.5 V stress rating only; functional operation of the product at these EN −0.3 V < IN + 0.3 V or any other conditions above those indicated in the operational PV, SYNC, FREQ, COMP, SS, FB, PGOOD, −0.3 V to +6 V section of this specification is not implied. Operation beyond CLKSET, CLKOUT, VREG, TRK the maximum operating conditions for extended periods may BST-to-GND, SW-to-GND −0.3 V to +30 V affect product reliability. BST-to-SW −0.3 V to +6 V Absolute maximum ratings apply individually only, not in BST-to-GND, SW-to-GND, 50 ns transients +38 V combination. Unless otherwise specified all other voltages SW-to-GND, 30 ns negative transients −7 V are referenced to GND. CSL-to-GND −1 V to +30 V DH-to-GND (SW − 0.3 V) to
ESD CAUTION
(BST + 0.3 V) DL-to-PGND −0.3 V to (PV + 0.3 V) PGND-to-GND ±2 V θJA, 20-Lead QSOP on a Multilayer PCB 83°C/W (Natural Convection)1 θJA, 20-Lead LFCSP on a Multilayer PCB 35.6°C/W (Natural Convection)1 Operating Junction Temperature2 −40°C to +125°C Storage Temperature −65°C to +150°C Maximum Soldering Lead Temperature 260°C 1 Junction-to-ambient thermal resistance (θJA) of the package was calculated or simulated on a multilayer PCB. 2 The junction temperature, TJ, of the device is dependent on the ambient temperature, TA, the power dissipation of the device, PD, and the junction-to- ambient thermal resistance of the package, θJA. Maximum junction temperature is calculated from the ambient temperature and power dissipation using the formula TJ = TA + PD × θJA. Rev. E | Page 6 of 33 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION SIMPLIFIED BLOCK DIAGRAM PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION INPUT POWER INTERNAL LINEAR REGULATOR SOFT START ERROR AMPLIFIER CURRENT-LIMIT SCHEME MOSFET DRIVERS SETTING THE OUTPUT VOLTAGE SWITCHING FREQUENCY CONTROL AND SYNCHRONIZATION COMPENSATION POWER-GOOD INDICATOR THERMAL SHUTDOWN SHUTDOWN CONTROL TRACKING APPLICATION INFORMATION SELECTING THE INPUT CAPACITOR OUTPUT LC FILTER SELECTING THE MOSFETS SETTING THE CURRENT LIMIT ACCURATE CURRENT-LIMIT SENSING FEEDBACK VOLTAGE DIVIDER COMPENSATING THE VOLTAGE MODE BUCK REGULATOR Type II Compensator Type III Compensator SOFT START SWITCHING NOISE AND OVERSHOOT REDUCTION VOLTAGE TRACKING COINCIDENT TRACKING RATIOMETRIC TRACKING THERMAL CONSIDERATIONS PCB LAYOUT GUIDELINE RECOMMENDED COMPONENT MANUFACTURERS APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
Stresses at or above those listed under Absolute Maximum
Parameter Rating
Ratings may cause permanent damage to the product. This is a IN −0.3 V to +20.5 V stress rating only; functional operation of the product at these EN −0.3 V < IN + 0.3 V or any other conditions above those indicated in the operational PV, SYNC, FREQ, COMP, SS, FB, PGOOD, −0.3 V to +6 V section of this specification is not implied. Operation beyond CLKSET, CLKOUT, VREG, TRK the maximum operating conditions for extended periods may BST-to-GND, SW-to-GND −0.3 V to +30 V affect product reliability. BST-to-SW −0.3 V to +6 V Absolute maximum ratings apply individually only, not in BST-to-GND, SW-to-GND, 50 ns transients +38 V combination. Unless otherwise specified all other voltages SW-to-GND, 30 ns negative transients −7 V are referenced to GND. CSL-to-GND −1 V to +30 V DH-to-GND (SW − 0.3 V) to
ESD CAUTION
(BST + 0.3 V) DL-to-PGND −0.3 V to (PV + 0.3 V) PGND-to-GND ±2 V θJA, 20-Lead QSOP on a Multilayer PCB 83°C/W (Natural Convection)1 θJA, 20-Lead LFCSP on a Multilayer PCB 35.6°C/W (Natural Convection)1 Operating Junction Temperature2 −40°C to +125°C Storage Temperature −65°C to +150°C Maximum Soldering Lead Temperature 260°C 1 Junction-to-ambient thermal resistance (θJA) of the package was calculated or simulated on a multilayer PCB. 2 The junction temperature, TJ, of the device is dependent on the ambient temperature, TA, the power dissipation of the device, PD, and the junction-to- ambient thermal resistance of the package, θJA. Maximum junction temperature is calculated from the ambient temperature and power dissipation using the formula TJ = TA + PD × θJA. Rev. E | Page 6 of 33 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION SIMPLIFIED BLOCK DIAGRAM PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION INPUT POWER INTERNAL LINEAR REGULATOR SOFT START ERROR AMPLIFIER CURRENT-LIMIT SCHEME MOSFET DRIVERS SETTING THE OUTPUT VOLTAGE SWITCHING FREQUENCY CONTROL AND SYNCHRONIZATION COMPENSATION POWER-GOOD INDICATOR THERMAL SHUTDOWN SHUTDOWN CONTROL TRACKING APPLICATION INFORMATION SELECTING THE INPUT CAPACITOR OUTPUT LC FILTER SELECTING THE MOSFETS SETTING THE CURRENT LIMIT ACCURATE CURRENT-LIMIT SENSING FEEDBACK VOLTAGE DIVIDER COMPENSATING THE VOLTAGE MODE BUCK REGULATOR Type II Compensator Type III Compensator SOFT START SWITCHING NOISE AND OVERSHOOT REDUCTION VOLTAGE TRACKING COINCIDENT TRACKING RATIOMETRIC TRACKING THERMAL CONSIDERATIONS PCB LAYOUT GUIDELINE RECOMMENDED COMPONENT MANUFACTURERS APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE